diff --git a/target/mips/internal.h b/target/mips/internal.h index 5dd17ff733..d09afded5e 100644 --- a/target/mips/internal.h +++ b/target/mips/internal.h @@ -111,7 +111,7 @@ struct CPUMIPSTLBContext { uint32_t nb_tlb; uint32_t tlb_in_use; int (*map_address)(struct CPUMIPSState *env, hwaddr *physical, int *prot, - target_ulong address, int rw, int access_type); + target_ulong address, int rw); void (*helper_tlbwi)(struct CPUMIPSState *env); void (*helper_tlbwr)(struct CPUMIPSState *env); void (*helper_tlbp)(struct CPUMIPSState *env); @@ -126,11 +126,11 @@ struct CPUMIPSTLBContext { }; int no_mmu_map_address(CPUMIPSState *env, hwaddr *physical, int *prot, - target_ulong address, int rw, int access_type); + target_ulong address, int rw); int fixed_mmu_map_address(CPUMIPSState *env, hwaddr *physical, int *prot, - target_ulong address, int rw, int access_type); + target_ulong address, int rw); int r4k_map_address(CPUMIPSState *env, hwaddr *physical, int *prot, - target_ulong address, int rw, int access_type); + target_ulong address, int rw); void r4k_helper_tlbwi(CPUMIPSState *env); void r4k_helper_tlbwr(CPUMIPSState *env); void r4k_helper_tlbp(CPUMIPSState *env); diff --git a/target/mips/tlb_helper.c b/target/mips/tlb_helper.c index 082c17928d..1af2dc969d 100644 --- a/target/mips/tlb_helper.c +++ b/target/mips/tlb_helper.c @@ -39,7 +39,7 @@ enum { /* no MMU emulation */ int no_mmu_map_address(CPUMIPSState *env, hwaddr *physical, int *prot, - target_ulong address, int rw, int access_type) + target_ulong address, int rw) { *physical = address; *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC; @@ -48,7 +48,7 @@ int no_mmu_map_address(CPUMIPSState *env, hwaddr *physical, int *prot, /* fixed mapping MMU emulation */ int fixed_mmu_map_address(CPUMIPSState *env, hwaddr *physical, int *prot, - target_ulong address, int rw, int access_type) + target_ulong address, int rw) { if (address <= (int32_t)0x7FFFFFFFUL) { if (!(env->CP0_Status & (1 << CP0St_ERL))) { @@ -68,7 +68,7 @@ int fixed_mmu_map_address(CPUMIPSState *env, hwaddr *physical, int *prot, /* MIPS32/MIPS64 R4000-style MMU emulation */ int r4k_map_address(CPUMIPSState *env, hwaddr *physical, int *prot, - target_ulong address, int rw, int access_type) + target_ulong address, int rw) { uint16_t ASID = env->CP0_EntryHi & env->CP0_EntryHi_ASID_mask; uint32_t MMID = env->CP0_MemoryMapID; @@ -234,8 +234,7 @@ static int get_seg_physical_address(CPUMIPSState *env, hwaddr *physical, return mapped; } else if (mapped) { /* The segment is TLB mapped */ - return env->tlb->map_address(env, physical, prot, real_address, rw, - access_type); + return env->tlb->map_address(env, physical, prot, real_address, rw); } else { /* The segment is unmapped */ *physical = physical_base | (real_address & segmask); @@ -314,7 +313,7 @@ static int get_physical_address(CPUMIPSState *env, hwaddr *physical, /* xuseg */ if (UX && address <= (0x3FFFFFFFFFFFFFFFULL & env->SEGMask)) { ret = env->tlb->map_address(env, physical, prot, - real_address, rw, access_type); + real_address, rw); } else { ret = TLBRET_BADADDR; } @@ -323,7 +322,7 @@ static int get_physical_address(CPUMIPSState *env, hwaddr *physical, if ((supervisor_mode || kernel_mode) && SX && address <= (0x7FFFFFFFFFFFFFFFULL & env->SEGMask)) { ret = env->tlb->map_address(env, physical, prot, - real_address, rw, access_type); + real_address, rw); } else { ret = TLBRET_BADADDR; } @@ -364,7 +363,7 @@ static int get_physical_address(CPUMIPSState *env, hwaddr *physical, if (kernel_mode && KX && address <= (0xFFFFFFFF7FFFFFFFULL & env->SEGMask)) { ret = env->tlb->map_address(env, physical, prot, - real_address, rw, access_type); + real_address, rw); } else { ret = TLBRET_BADADDR; }