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hw/pxa2xx.c: Fix handling of R/WC bits in PMCR

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Fix a bug in handling the write-one-to-clear bits in the PMCR
which meant that we would always clear the bit even if the
value written was a zero. Spotted by Coverity (see bug 887883).

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
This commit is contained in:
Peter Maydell 2011-11-09 20:46:35 +00:00 committed by Anthony Liguori
parent b78c2b3aad
commit afd4a65225
1 changed files with 3 additions and 1 deletions
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4
hw/pxa2xx.c
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@ -114,7 +114,9 @@ static void pxa2xx_pm_write(void *opaque, target_phys_addr_t addr,
switch (addr) {
case PMCR:
s->pm_regs[addr >> 2] &= 0x15 & ~(value & 0x2a);
/* Clear the write-one-to-clear bits... */
s->pm_regs[addr >> 2] &= ~(value & 0x2a);
/* ...and set the plain r/w bits */
s->pm_regs[addr >> 2] |= value & 0x15;
break;