ppc/pnv: Add POWER10 quads
and use a pnv_chip_power10_quad_realize() helper to avoid code duplication with P9. This still needs some refinements on the XSCOM registers handling in PnvQuad. Signed-off-by: Cédric Le Goater <clg@kaod.org>
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hw/ppc/pnv.c
50
hw/ppc/pnv.c
@ -1388,6 +1388,21 @@ static void pnv_chip_power9_instance_init(Object *obj)
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}
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}
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static void pnv_chip_quad_realize_one(PnvChip *chip, PnvQuad *eq,
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PnvCore *pnv_core)
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{
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char eq_name[32];
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int core_id = CPU_CORE(pnv_core)->core_id;
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snprintf(eq_name, sizeof(eq_name), "eq[%d]", core_id);
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object_initialize_child_with_props(OBJECT(chip), eq_name, eq,
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sizeof(*eq), TYPE_PNV_QUAD,
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&error_fatal, NULL);
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object_property_set_int(OBJECT(eq), "quad-id", core_id, &error_fatal);
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qdev_realize(DEVICE(eq), NULL, &error_fatal);
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}
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static void pnv_chip_quad_realize(Pnv9Chip *chip9, Error **errp)
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{
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PnvChip *chip = PNV_CHIP(chip9);
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@ -1397,18 +1412,9 @@ static void pnv_chip_quad_realize(Pnv9Chip *chip9, Error **errp)
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chip9->quads = g_new0(PnvQuad, chip9->nr_quads);
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for (i = 0; i < chip9->nr_quads; i++) {
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char eq_name[32];
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PnvQuad *eq = &chip9->quads[i];
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PnvCore *pnv_core = chip->cores[i * 4];
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int core_id = CPU_CORE(pnv_core)->core_id;
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snprintf(eq_name, sizeof(eq_name), "eq[%d]", core_id);
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object_initialize_child_with_props(OBJECT(chip), eq_name, eq,
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sizeof(*eq), TYPE_PNV_QUAD,
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&error_fatal, NULL);
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object_property_set_int(OBJECT(eq), "quad-id", core_id, &error_fatal);
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qdev_realize(DEVICE(eq), NULL, &error_fatal);
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pnv_chip_quad_realize_one(chip, eq, chip->cores[i * 4]);
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pnv_xscom_add_subregion(chip, PNV9_XSCOM_EQ_BASE(eq->quad_id),
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&eq->xscom_regs);
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@ -1585,6 +1591,24 @@ static void pnv_chip_power10_instance_init(Object *obj)
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object_initialize_child(obj, "occ", &chip10->occ, TYPE_PNV10_OCC);
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}
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static void pnv_chip_power10_quad_realize(Pnv10Chip *chip10, Error **errp)
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{
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PnvChip *chip = PNV_CHIP(chip10);
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int i;
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chip10->nr_quads = DIV_ROUND_UP(chip->nr_cores, 4);
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chip10->quads = g_new0(PnvQuad, chip10->nr_quads);
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for (i = 0; i < chip10->nr_quads; i++) {
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PnvQuad *eq = &chip10->quads[i];
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pnv_chip_quad_realize_one(chip, eq, chip->cores[i * 4]);
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pnv_xscom_add_subregion(chip, PNV10_XSCOM_EQ_BASE(eq->quad_id),
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&eq->xscom_regs);
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}
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}
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static void pnv_chip_power10_realize(DeviceState *dev, Error **errp)
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{
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PnvChipClass *pcc = PNV_CHIP_GET_CLASS(dev);
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@ -1606,6 +1630,12 @@ static void pnv_chip_power10_realize(DeviceState *dev, Error **errp)
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return;
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}
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pnv_chip_power10_quad_realize(chip10, &local_err);
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if (local_err) {
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error_propagate(errp, local_err);
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return;
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}
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/* XIVE2 interrupt controller (POWER10) */
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object_property_set_int(OBJECT(&chip10->xive), "ic-bar",
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PNV10_XIVE2_IC_BASE(chip), &error_fatal);
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@ -129,6 +129,9 @@ struct Pnv10Chip {
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Pnv9Psi psi;
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PnvLpcController lpc;
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PnvOCC occ;
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uint32_t nr_quads;
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PnvQuad *quads;
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};
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#define PNV10_PIR2FUSEDCORE(pir) (((pir) >> 3) & 0xf)
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