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target/m68k: Fix address argument for EXCP_CHK

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According to the M68040 Users Manual, section 8.4.3,
Six word stack frame (format 2), CHK, CHK2 (and others)
are supposed to record the next insn in PC and the
address of the trapping instruction in ADDRESS.

Create a raise_exception_format2 function to centralize recording
of the trapping pc in mmu.ar, plus advancing to the next insn.

Update m68k_interrupt_all to pass mmu.ar to do_stack_frame.
Update cpu_loop to pass mmu.ar to siginfo.si_addr, as the
kernel does in trap_c().

Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220602013401.303699-7-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
This commit is contained in:
Richard Henderson 2022-06-01 18:33:50 -07:00 committed by Laurent Vivier
parent 035c6e7b5d
commit ad5a5cf97d
3 changed files with 36 additions and 26 deletions
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2
linux-user/m68k/cpu_loop.c
View File

@ -47,7 +47,7 @@ void cpu_loop(CPUM68KState *env)
force_sig_fault(TARGET_SIGILL, TARGET_ILL_ILLOPN, env->pc);
break;
case EXCP_CHK:
force_sig_fault(TARGET_SIGFPE, TARGET_FPE_INTOVF, env->pc);
force_sig_fault(TARGET_SIGFPE, TARGET_FPE_INTOVF, env->mmu.ar);
break;
case EXCP_DIV0:
force_sig_fault(TARGET_SIGFPE, TARGET_FPE_INTDIV, env->pc);

6
target/m68k/cpu.h
View File

@ -122,6 +122,12 @@ typedef struct CPUArchState {
/* MMU status. */
struct {
/*
* Holds the "address" value in between raising an exception
* and creation of the exception stack frame.
* Used for both Format 7 exceptions (Access, i.e. mmu)
* and Format 2 exceptions (chk, div0, trapcc, etc).
*/
uint32_t ar;
uint32_t ssw;
/* 68040 */

54
target/m68k/op_helper.c
View File

@ -397,13 +397,16 @@ static void m68k_interrupt_all(CPUM68KState *env, int is_hw)
case EXCP_ILLEGAL:
case EXCP_DIV0:
case EXCP_CHK:
case EXCP_TRAPCC:
case EXCP_TRACE:
/* FIXME: addr is not only env->pc */
do_stack_frame(env, &sp, 2, oldsr, env->pc, env->pc);
break;
case EXCP_CHK:
do_stack_frame(env, &sp, 2, oldsr, env->mmu.ar, env->pc);
break;
case EXCP_SPURIOUS ... EXCP_INT_LEVEL_7:
if (is_hw && (oldsr & SR_M)) {
do_stack_frame(env, &sp, 0, oldsr, 0, env->pc);
@ -548,6 +551,29 @@ void HELPER(raise_exception)(CPUM68KState *env, uint32_t tt)
raise_exception(env, tt);
}
G_NORETURN static void
raise_exception_format2(CPUM68KState *env, int tt, int ilen, uintptr_t raddr)
{
CPUState *cs = env_cpu(env);
cs->exception_index = tt;
/* Recover PC and CC_OP for the beginning of the insn. */
cpu_restore_state(cs, raddr, true);
/* Flags are current in env->cc_*, or are undefined. */
env->cc_op = CC_OP_FLAGS;
/*
* Remember original pc in mmu.ar, for the Format 2 stack frame.
* Adjust PC to end of the insn.
*/
env->mmu.ar = env->pc;
env->pc += ilen;
cpu_loop_exit(cs);
}
void HELPER(divuw)(CPUM68KState *env, int destr, uint32_t den)
{
uint32_t num = env->dregs[destr];
@ -1065,18 +1091,7 @@ void HELPER(chk)(CPUM68KState *env, int32_t val, int32_t ub)
env->cc_c = 0 <= ub ? val < 0 || val > ub : val > ub && val < 0;
if (val < 0 || val > ub) {
CPUState *cs = env_cpu(env);
/* Recover PC and CC_OP for the beginning of the insn. */
cpu_restore_state(cs, GETPC(), true);
/* flags have been modified by gen_flush_flags() */
env->cc_op = CC_OP_FLAGS;
/* Adjust PC to end of the insn. */
env->pc += 2;
cs->exception_index = EXCP_CHK;
cpu_loop_exit(cs);
raise_exception_format2(env, EXCP_CHK, 2, GETPC());
}
}
@ -1097,17 +1112,6 @@ void HELPER(chk2)(CPUM68KState *env, int32_t val, int32_t lb, int32_t ub)
env->cc_c = lb <= ub ? val < lb || val > ub : val > ub && val < lb;
if (env->cc_c) {
CPUState *cs = env_cpu(env);
/* Recover PC and CC_OP for the beginning of the insn. */
cpu_restore_state(cs, GETPC(), true);
/* flags have been modified by gen_flush_flags() */
env->cc_op = CC_OP_FLAGS;
/* Adjust PC to end of the insn. */
env->pc += 4;
cs->exception_index = EXCP_CHK;
cpu_loop_exit(cs);
raise_exception_format2(env, EXCP_CHK, 4, GETPC());
}
}