tcg-s390: Allow immediate operands to add2 and sub2
Signed-off-by: Richard Henderson <rth@twiddle.net>
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@ -42,6 +42,7 @@
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#define TCG_CT_CONST_ORI 0x200
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#define TCG_CT_CONST_XORI 0x400
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#define TCG_CT_CONST_CMPI 0x800
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#define TCG_CT_CONST_ADLI 0x1000
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/* Several places within the instruction set 0 means "no register"
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rather than TCG_REG_R0. */
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@ -403,6 +404,9 @@ static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str)
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tcg_regset_clear(ct->u.regs);
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tcg_regset_set_reg(ct->u.regs, TCG_REG_R3);
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break;
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case 'A':
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ct->ct |= TCG_CT_CONST_ADLI;
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break;
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case 'K':
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ct->ct |= TCG_CT_CONST_MULI;
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break;
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@ -507,6 +511,20 @@ static int tcg_match_cmpi(TCGType type, tcg_target_long val)
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}
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}
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/* Immediates to be used with add2/sub2. */
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static int tcg_match_add2i(TCGType type, tcg_target_long val)
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{
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if (facilities & FACILITY_EXT_IMM) {
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if (type == TCG_TYPE_I32) {
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return 1;
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} else if (val >= -0xffffffffll && val <= 0xffffffffll) {
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return 1;
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}
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}
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return 0;
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}
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/* Test if a constant matches the constraint. */
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static int tcg_target_const_match(tcg_target_long val, TCGType type,
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const TCGArgConstraint *arg_ct)
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@ -532,6 +550,8 @@ static int tcg_target_const_match(tcg_target_long val, TCGType type,
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} else {
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return val == (int16_t)val;
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}
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} else if (ct & TCG_CT_CONST_ADLI) {
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return tcg_match_add2i(type, val);
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} else if (ct & TCG_CT_CONST_ORI) {
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return tcg_match_ori(type, val);
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} else if (ct & TCG_CT_CONST_XORI) {
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@ -1780,13 +1800,19 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
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break;
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case INDEX_op_add2_i32:
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/* ??? Make use of ALFI. */
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tcg_out_insn(s, RR, ALR, args[0], args[4]);
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if (const_args[4]) {
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tcg_out_insn(s, RIL, ALFI, args[0], args[4]);
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} else {
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tcg_out_insn(s, RR, ALR, args[0], args[4]);
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}
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tcg_out_insn(s, RRE, ALCR, args[1], args[5]);
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break;
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case INDEX_op_sub2_i32:
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/* ??? Make use of SLFI. */
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tcg_out_insn(s, RR, SLR, args[0], args[4]);
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if (const_args[4]) {
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tcg_out_insn(s, RIL, SLFI, args[0], args[4]);
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} else {
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tcg_out_insn(s, RR, SLR, args[0], args[4]);
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}
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tcg_out_insn(s, RRE, SLBR, args[1], args[5]);
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break;
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@ -1987,13 +2013,27 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
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break;
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case INDEX_op_add2_i64:
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/* ??? Make use of ALGFI and SLGFI. */
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tcg_out_insn(s, RRE, ALGR, args[0], args[4]);
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if (const_args[4]) {
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if ((int64_t)args[4] >= 0) {
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tcg_out_insn(s, RIL, ALGFI, args[0], args[4]);
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} else {
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tcg_out_insn(s, RIL, SLGFI, args[0], -args[4]);
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}
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} else {
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tcg_out_insn(s, RRE, ALGR, args[0], args[4]);
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}
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tcg_out_insn(s, RRE, ALCGR, args[1], args[5]);
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break;
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case INDEX_op_sub2_i64:
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/* ??? Make use of ALGFI and SLGFI. */
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tcg_out_insn(s, RRE, SLGR, args[0], args[4]);
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if (const_args[4]) {
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if ((int64_t)args[4] >= 0) {
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tcg_out_insn(s, RIL, SLGFI, args[0], args[4]);
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} else {
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tcg_out_insn(s, RIL, ALGFI, args[0], -args[4]);
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}
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} else {
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tcg_out_insn(s, RRE, SLGR, args[0], args[4]);
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}
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tcg_out_insn(s, RRE, SLBGR, args[1], args[5]);
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break;
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@ -2066,8 +2106,8 @@ static const TCGTargetOpDef s390_op_defs[] = {
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{ INDEX_op_bswap16_i32, { "r", "r" } },
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{ INDEX_op_bswap32_i32, { "r", "r" } },
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{ INDEX_op_add2_i32, { "r", "r", "0", "1", "r", "r" } },
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{ INDEX_op_sub2_i32, { "r", "r", "0", "1", "r", "r" } },
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{ INDEX_op_add2_i32, { "r", "r", "0", "1", "rA", "r" } },
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{ INDEX_op_sub2_i32, { "r", "r", "0", "1", "rA", "r" } },
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{ INDEX_op_brcond_i32, { "r", "rC" } },
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{ INDEX_op_setcond_i32, { "r", "r", "rC" } },
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@ -2124,8 +2164,8 @@ static const TCGTargetOpDef s390_op_defs[] = {
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{ INDEX_op_bswap32_i64, { "r", "r" } },
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{ INDEX_op_bswap64_i64, { "r", "r" } },
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{ INDEX_op_add2_i64, { "r", "r", "0", "1", "r", "r" } },
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{ INDEX_op_sub2_i64, { "r", "r", "0", "1", "r", "r" } },
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{ INDEX_op_add2_i64, { "r", "r", "0", "1", "rA", "r" } },
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{ INDEX_op_sub2_i64, { "r", "r", "0", "1", "rA", "r" } },
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{ INDEX_op_brcond_i64, { "r", "rC" } },
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{ INDEX_op_setcond_i64, { "r", "r", "rC" } },
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