target/arm: Implement MVE VMULL
Implement the MVE VMULL insn, which multiplies two single width integer elements to produce a double width result. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210617121628.20116-19-peter.maydell@linaro.org
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@ -130,3 +130,17 @@ DEF_HELPER_FLAGS_4(mve_vhsubsw, TCG_CALL_NO_WG, void, env, ptr, ptr, ptr)
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DEF_HELPER_FLAGS_4(mve_vhsubub, TCG_CALL_NO_WG, void, env, ptr, ptr, ptr)
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DEF_HELPER_FLAGS_4(mve_vhsubuh, TCG_CALL_NO_WG, void, env, ptr, ptr, ptr)
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DEF_HELPER_FLAGS_4(mve_vhsubuw, TCG_CALL_NO_WG, void, env, ptr, ptr, ptr)
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DEF_HELPER_FLAGS_4(mve_vmullbsb, TCG_CALL_NO_WG, void, env, ptr, ptr, ptr)
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DEF_HELPER_FLAGS_4(mve_vmullbsh, TCG_CALL_NO_WG, void, env, ptr, ptr, ptr)
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DEF_HELPER_FLAGS_4(mve_vmullbsw, TCG_CALL_NO_WG, void, env, ptr, ptr, ptr)
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DEF_HELPER_FLAGS_4(mve_vmullbub, TCG_CALL_NO_WG, void, env, ptr, ptr, ptr)
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DEF_HELPER_FLAGS_4(mve_vmullbuh, TCG_CALL_NO_WG, void, env, ptr, ptr, ptr)
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DEF_HELPER_FLAGS_4(mve_vmullbuw, TCG_CALL_NO_WG, void, env, ptr, ptr, ptr)
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DEF_HELPER_FLAGS_4(mve_vmulltsb, TCG_CALL_NO_WG, void, env, ptr, ptr, ptr)
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DEF_HELPER_FLAGS_4(mve_vmulltsh, TCG_CALL_NO_WG, void, env, ptr, ptr, ptr)
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DEF_HELPER_FLAGS_4(mve_vmulltsw, TCG_CALL_NO_WG, void, env, ptr, ptr, ptr)
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DEF_HELPER_FLAGS_4(mve_vmulltub, TCG_CALL_NO_WG, void, env, ptr, ptr, ptr)
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DEF_HELPER_FLAGS_4(mve_vmulltuh, TCG_CALL_NO_WG, void, env, ptr, ptr, ptr)
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DEF_HELPER_FLAGS_4(mve_vmulltuw, TCG_CALL_NO_WG, void, env, ptr, ptr, ptr)
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@ -101,6 +101,11 @@ VHADD_U 111 1 1111 0 . .. ... 0 ... 0 0000 . 1 . 0 ... 0 @2op
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VHSUB_S 111 0 1111 0 . .. ... 0 ... 0 0010 . 1 . 0 ... 0 @2op
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VHSUB_U 111 1 1111 0 . .. ... 0 ... 0 0010 . 1 . 0 ... 0 @2op
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VMULL_BS 111 0 1110 0 . .. ... 1 ... 0 1110 . 0 . 0 ... 0 @2op
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VMULL_BU 111 1 1110 0 . .. ... 1 ... 0 1110 . 0 . 0 ... 0 @2op
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VMULL_TS 111 0 1110 0 . .. ... 1 ... 1 1110 . 0 . 0 ... 0 @2op
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VMULL_TU 111 1 1110 0 . .. ... 1 ... 1 1110 . 0 . 0 ... 0 @2op
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# Vector miscellaneous
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VCLS 1111 1111 1 . 11 .. 00 ... 0 0100 01 . 0 ... 0 @1op
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@ -349,6 +349,26 @@ DO_1OP(vfnegs, 8, uint64_t, DO_FNEGS)
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DO_2OP(OP##h, 2, int16_t, FN) \
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DO_2OP(OP##w, 4, int32_t, FN)
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/*
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* "Long" operations where two half-sized inputs (taken from either the
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* top or the bottom of the input vector) produce a double-width result.
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* Here ESIZE, TYPE are for the input, and LESIZE, LTYPE for the output.
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*/
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#define DO_2OP_L(OP, TOP, ESIZE, TYPE, LESIZE, LTYPE, FN) \
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void HELPER(glue(mve_, OP))(CPUARMState *env, void *vd, void *vn, void *vm) \
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{ \
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LTYPE *d = vd; \
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TYPE *n = vn, *m = vm; \
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uint16_t mask = mve_element_mask(env); \
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unsigned le; \
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for (le = 0; le < 16 / LESIZE; le++, mask >>= LESIZE) { \
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LTYPE r = FN((LTYPE)n[H##ESIZE(le * 2 + TOP)], \
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m[H##ESIZE(le * 2 + TOP)]); \
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mergemask(&d[H##LESIZE(le)], r, mask); \
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} \
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mve_advance_vpt(env); \
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}
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#define DO_AND(N, M) ((N) & (M))
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#define DO_BIC(N, M) ((N) & ~(M))
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#define DO_ORR(N, M) ((N) | (M))
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@ -369,6 +389,20 @@ DO_2OP_U(vadd, DO_ADD)
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DO_2OP_U(vsub, DO_SUB)
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DO_2OP_U(vmul, DO_MUL)
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DO_2OP_L(vmullbsb, 0, 1, int8_t, 2, int16_t, DO_MUL)
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DO_2OP_L(vmullbsh, 0, 2, int16_t, 4, int32_t, DO_MUL)
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DO_2OP_L(vmullbsw, 0, 4, int32_t, 8, int64_t, DO_MUL)
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DO_2OP_L(vmullbub, 0, 1, uint8_t, 2, uint16_t, DO_MUL)
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DO_2OP_L(vmullbuh, 0, 2, uint16_t, 4, uint32_t, DO_MUL)
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DO_2OP_L(vmullbuw, 0, 4, uint32_t, 8, uint64_t, DO_MUL)
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DO_2OP_L(vmulltsb, 1, 1, int8_t, 2, int16_t, DO_MUL)
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DO_2OP_L(vmulltsh, 1, 2, int16_t, 4, int32_t, DO_MUL)
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DO_2OP_L(vmulltsw, 1, 4, int32_t, 8, int64_t, DO_MUL)
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DO_2OP_L(vmulltub, 1, 1, uint8_t, 2, uint16_t, DO_MUL)
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DO_2OP_L(vmulltuh, 1, 2, uint16_t, 4, uint32_t, DO_MUL)
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DO_2OP_L(vmulltuw, 1, 4, uint32_t, 8, uint64_t, DO_MUL)
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/*
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* Because the computation type is at least twice as large as required,
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* these work for both signed and unsigned source types.
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@ -361,3 +361,7 @@ DO_2OP(VHADD_S, vhadds)
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DO_2OP(VHADD_U, vhaddu)
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DO_2OP(VHSUB_S, vhsubs)
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DO_2OP(VHSUB_U, vhsubu)
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DO_2OP(VMULL_BS, vmullbs)
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DO_2OP(VMULL_BU, vmullbu)
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DO_2OP(VMULL_TS, vmullts)
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DO_2OP(VMULL_TU, vmulltu)
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