s390x/pci: add supported DT information to clp response
The DTSM is a mask that specifies which I/O Address Translation designation types are supported. Today QEMU only supports DT=1. Signed-off-by: Matthew Rosato <mjrosato@linux.ibm.com> Reviewed-by: Eric Farman <farman@linux.ibm.com> Reviewed-by: Pierre Morel <pmorel@linux.ibm.com> Message-Id: <20211203142706.427279-5-mjrosato@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
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@ -782,6 +782,7 @@ static void s390_pci_init_default_group(void)
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resgrp->i = 128;
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resgrp->i = 128;
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resgrp->maxstbl = 128;
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resgrp->maxstbl = 128;
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resgrp->version = 0;
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resgrp->version = 0;
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resgrp->dtsm = ZPCI_DTSM;
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}
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}
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static void set_pbdev_info(S390PCIBusDevice *pbdev)
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static void set_pbdev_info(S390PCIBusDevice *pbdev)
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@ -329,6 +329,7 @@ int clp_service_call(S390CPU *cpu, uint8_t r2, uintptr_t ra)
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stw_p(&resgrp->i, group->zpci_group.i);
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stw_p(&resgrp->i, group->zpci_group.i);
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stw_p(&resgrp->maxstbl, group->zpci_group.maxstbl);
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stw_p(&resgrp->maxstbl, group->zpci_group.maxstbl);
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resgrp->version = group->zpci_group.version;
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resgrp->version = group->zpci_group.version;
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resgrp->dtsm = group->zpci_group.dtsm;
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stw_p(&resgrp->hdr.rsp, CLP_RC_OK);
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stw_p(&resgrp->hdr.rsp, CLP_RC_OK);
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break;
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break;
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}
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}
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@ -160,6 +160,7 @@ static void s390_pci_read_group(S390PCIBusDevice *pbdev,
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resgrp->i = cap->noi;
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resgrp->i = cap->noi;
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resgrp->maxstbl = cap->maxstbl;
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resgrp->maxstbl = cap->maxstbl;
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resgrp->version = cap->version;
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resgrp->version = cap->version;
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resgrp->dtsm = ZPCI_DTSM;
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}
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}
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}
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}
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@ -37,6 +37,7 @@
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#define ZPCI_MAX_UID 0xffff
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#define ZPCI_MAX_UID 0xffff
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#define UID_UNDEFINED 0
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#define UID_UNDEFINED 0
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#define UID_CHECKING_ENABLED 0x01
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#define UID_CHECKING_ENABLED 0x01
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#define ZPCI_DTSM 0x40
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OBJECT_DECLARE_SIMPLE_TYPE(S390pciState, S390_PCI_HOST_BRIDGE)
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OBJECT_DECLARE_SIMPLE_TYPE(S390pciState, S390_PCI_HOST_BRIDGE)
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OBJECT_DECLARE_SIMPLE_TYPE(S390PCIBus, S390_PCI_BUS)
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OBJECT_DECLARE_SIMPLE_TYPE(S390PCIBus, S390_PCI_BUS)
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@ -163,7 +163,8 @@ typedef struct ClpRspQueryPciGrp {
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uint8_t fr;
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uint8_t fr;
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uint16_t maxstbl;
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uint16_t maxstbl;
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uint16_t mui;
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uint16_t mui;
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uint64_t reserved3;
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uint8_t dtsm;
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uint8_t reserved3[7];
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uint64_t dasm; /* dma address space mask */
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uint64_t dasm; /* dma address space mask */
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uint64_t msia; /* MSI address */
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uint64_t msia; /* MSI address */
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uint64_t reserved4;
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uint64_t reserved4;
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