hw/timer: Remove omap_synctimer
Remove the omap_synctimer device, which is only in the OMAP2 SoC. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240903160751.4100218-46-peter.maydell@linaro.org
This commit is contained in:
parent
9d78324be9
commit
ac2da7f9fe
@ -21,7 +21,6 @@ system_ss.add(when: 'CONFIG_MIPS_CPS', if_true: files('mips_gictimer.c'))
|
||||
system_ss.add(when: 'CONFIG_MSF2', if_true: files('mss-timer.c'))
|
||||
system_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_timer.c'))
|
||||
system_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_timer.c'))
|
||||
system_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_synctimer.c'))
|
||||
system_ss.add(when: 'CONFIG_PXA2XX_TIMER', if_true: files('pxa2xx_timer.c'))
|
||||
system_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_systmr.c'))
|
||||
system_ss.add(when: 'CONFIG_SH_TIMER', if_true: files('sh_timer.c'))
|
||||
|
@ -1,110 +0,0 @@
|
||||
/*
|
||||
* TI OMAP2 32kHz sync timer emulation.
|
||||
*
|
||||
* Copyright (C) 2007-2008 Nokia Corporation
|
||||
* Written by Andrzej Zaborowski <andrew@openedhand.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 or
|
||||
* (at your option) any later version of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
#include "qemu/osdep.h"
|
||||
#include "qemu/timer.h"
|
||||
#include "hw/arm/omap.h"
|
||||
struct omap_synctimer_s {
|
||||
MemoryRegion iomem;
|
||||
uint32_t val;
|
||||
uint16_t readh;
|
||||
};
|
||||
|
||||
/* 32-kHz Sync Timer of the OMAP2 */
|
||||
static uint32_t omap_synctimer_read(struct omap_synctimer_s *s) {
|
||||
return muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), 0x8000,
|
||||
NANOSECONDS_PER_SECOND);
|
||||
}
|
||||
|
||||
void omap_synctimer_reset(struct omap_synctimer_s *s)
|
||||
{
|
||||
s->val = omap_synctimer_read(s);
|
||||
}
|
||||
|
||||
static uint32_t omap_synctimer_readw(void *opaque, hwaddr addr)
|
||||
{
|
||||
struct omap_synctimer_s *s = opaque;
|
||||
|
||||
switch (addr) {
|
||||
case 0x00: /* 32KSYNCNT_REV */
|
||||
return 0x21;
|
||||
|
||||
case 0x10: /* CR */
|
||||
return omap_synctimer_read(s) - s->val;
|
||||
}
|
||||
|
||||
OMAP_BAD_REG(addr);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static uint32_t omap_synctimer_readh(void *opaque, hwaddr addr)
|
||||
{
|
||||
struct omap_synctimer_s *s = opaque;
|
||||
uint32_t ret;
|
||||
|
||||
if (addr & 2)
|
||||
return s->readh;
|
||||
else {
|
||||
ret = omap_synctimer_readw(opaque, addr);
|
||||
s->readh = ret >> 16;
|
||||
return ret & 0xffff;
|
||||
}
|
||||
}
|
||||
|
||||
static uint64_t omap_synctimer_readfn(void *opaque, hwaddr addr,
|
||||
unsigned size)
|
||||
{
|
||||
switch (size) {
|
||||
case 1:
|
||||
return omap_badwidth_read32(opaque, addr);
|
||||
case 2:
|
||||
return omap_synctimer_readh(opaque, addr);
|
||||
case 4:
|
||||
return omap_synctimer_readw(opaque, addr);
|
||||
default:
|
||||
g_assert_not_reached();
|
||||
}
|
||||
}
|
||||
|
||||
static void omap_synctimer_writefn(void *opaque, hwaddr addr,
|
||||
uint64_t value, unsigned size)
|
||||
{
|
||||
OMAP_BAD_REG(addr);
|
||||
}
|
||||
|
||||
static const MemoryRegionOps omap_synctimer_ops = {
|
||||
.read = omap_synctimer_readfn,
|
||||
.write = omap_synctimer_writefn,
|
||||
.valid.min_access_size = 1,
|
||||
.valid.max_access_size = 4,
|
||||
.endianness = DEVICE_NATIVE_ENDIAN,
|
||||
};
|
||||
|
||||
struct omap_synctimer_s *omap_synctimer_init(struct omap_target_agent_s *ta,
|
||||
struct omap_mpu_state_s *mpu, omap_clk fclk, omap_clk iclk)
|
||||
{
|
||||
struct omap_synctimer_s *s = g_malloc0(sizeof(*s));
|
||||
|
||||
omap_synctimer_reset(s);
|
||||
memory_region_init_io(&s->iomem, NULL, &omap_synctimer_ops, s, "omap.synctimer",
|
||||
omap_l4_region_size(ta, 0));
|
||||
omap_l4_attach(ta, 0, &s->iomem);
|
||||
|
||||
return s;
|
||||
}
|
@ -676,12 +676,6 @@ struct omap_dma_lcd_channel_s {
|
||||
# define OMAP24XX_DMA_MS 63 /* Not in OMAP2420 */
|
||||
# define OMAP24XX_DMA_EXT_DMAREQ5 64
|
||||
|
||||
/* OMAP2 sysctimer */
|
||||
struct omap_synctimer_s;
|
||||
struct omap_synctimer_s *omap_synctimer_init(struct omap_target_agent_s *ta,
|
||||
struct omap_mpu_state_s *mpu, omap_clk fclk, omap_clk iclk);
|
||||
void omap_synctimer_reset(struct omap_synctimer_s *s);
|
||||
|
||||
struct omap_uart_s;
|
||||
struct omap_uart_s *omap_uart_init(hwaddr base,
|
||||
qemu_irq irq, omap_clk fclk, omap_clk iclk,
|
||||
@ -929,8 +923,6 @@ struct omap_mpu_state_s {
|
||||
/* OMAP2-only peripherals */
|
||||
struct omap_l4_s *l4;
|
||||
|
||||
struct omap_synctimer_s *synctimer;
|
||||
|
||||
struct omap_mcspi_s *mcspi[2];
|
||||
|
||||
struct omap_dss_s *dss;
|
||||
|
Loading…
Reference in New Issue
Block a user