tcg/tci: Split out tcg_out_op_rrrrrr

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2021-02-01 09:06:06 -10:00
parent 723c2b5bc5
commit ab5b8a3fb4

View File

@ -415,6 +415,23 @@ static void tcg_out_op_rrrrrc(TCGContext *s, TCGOpcode op,
old_code_ptr[1] = s->code_ptr - old_code_ptr; old_code_ptr[1] = s->code_ptr - old_code_ptr;
} }
static void tcg_out_op_rrrrrr(TCGContext *s, TCGOpcode op,
TCGReg r0, TCGReg r1, TCGReg r2,
TCGReg r3, TCGReg r4, TCGReg r5)
{
uint8_t *old_code_ptr = s->code_ptr;
tcg_out_op_t(s, op);
tcg_out_r(s, r0);
tcg_out_r(s, r1);
tcg_out_r(s, r2);
tcg_out_r(s, r3);
tcg_out_r(s, r4);
tcg_out_r(s, r5);
old_code_ptr[1] = s->code_ptr - old_code_ptr;
}
#endif #endif
static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg val, TCGReg base, static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg val, TCGReg base,
@ -601,14 +618,8 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
#if TCG_TARGET_REG_BITS == 32 #if TCG_TARGET_REG_BITS == 32
case INDEX_op_add2_i32: case INDEX_op_add2_i32:
case INDEX_op_sub2_i32: case INDEX_op_sub2_i32:
tcg_out_op_t(s, opc); tcg_out_op_rrrrrr(s, opc, args[0], args[1], args[2],
tcg_out_r(s, args[0]); args[3], args[4], args[5]);
tcg_out_r(s, args[1]);
tcg_out_r(s, args[2]);
tcg_out_r(s, args[3]);
tcg_out_r(s, args[4]);
tcg_out_r(s, args[5]);
old_code_ptr[1] = s->code_ptr - old_code_ptr;
break; break;
case INDEX_op_brcond2_i32: case INDEX_op_brcond2_i32:
tcg_out_op_t(s, opc); tcg_out_op_t(s, opc);