target-mips: No MIPS16 support for 4Kc, 4KEc cores
Fix regression introduced by d19954f46d
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4Kc and 4KEc don't support MIPS16.
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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@ -105,7 +105,7 @@ static const mips_def_t mips_defs[] =
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.CP0_Config1 = MIPS_CONFIG1 | (15 << CP0C1_MMU) |
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(0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) |
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(0 << CP0C1_DS) | (3 << CP0C1_DL) | (1 << CP0C1_DA) |
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(1 << CP0C1_CA),
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(0 << CP0C1_CA),
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.CP0_Config2 = MIPS_CONFIG2,
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.CP0_Config3 = MIPS_CONFIG3,
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.CP0_LLAddr_rw_bitmask = 0,
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@ -147,7 +147,7 @@ static const mips_def_t mips_defs[] =
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.CP0_Config1 = MIPS_CONFIG1 | (15 << CP0C1_MMU) |
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(0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) |
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(0 << CP0C1_DS) | (3 << CP0C1_DL) | (1 << CP0C1_DA) |
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(1 << CP0C1_CA),
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(0 << CP0C1_CA),
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.CP0_Config2 = MIPS_CONFIG2,
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.CP0_Config3 = MIPS_CONFIG3,
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.CP0_LLAddr_rw_bitmask = 0,
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@ -188,7 +188,7 @@ static const mips_def_t mips_defs[] =
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.CP0_Config1 = MIPS_CONFIG1 | (15 << CP0C1_MMU) |
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(0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) |
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(0 << CP0C1_DS) | (3 << CP0C1_DL) | (1 << CP0C1_DA) |
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(1 << CP0C1_CA),
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(0 << CP0C1_CA),
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.CP0_Config2 = MIPS_CONFIG2,
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.CP0_Config3 = MIPS_CONFIG3 | (0 << CP0C3_VInt),
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.CP0_LLAddr_rw_bitmask = 0,
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