util/cpuinfo-aarch64: Add OpenBSD support
Signed-off-by: Brad Smith <brad@comstyle.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <ZneEh51XKhxgZKpp@humpty.home.comstyle.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -20,6 +20,12 @@
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#ifdef CONFIG_DARWIN
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# include <sys/sysctl.h>
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#endif
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#ifdef __OpenBSD__
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# include <machine/armreg.h>
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# include <machine/cpu.h>
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# include <sys/types.h>
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# include <sys/sysctl.h>
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#endif
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unsigned cpuinfo;
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@ -72,6 +78,36 @@ unsigned __attribute__((constructor)) cpuinfo_init(void)
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info |= sysctl_for_bool("hw.optional.arm.FEAT_PMULL") * CPUINFO_PMULL;
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info |= sysctl_for_bool("hw.optional.arm.FEAT_BTI") * CPUINFO_BTI;
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#endif
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#ifdef __OpenBSD__
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int mib[2];
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uint64_t isar0;
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uint64_t pfr1;
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size_t len;
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mib[0] = CTL_MACHDEP;
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mib[1] = CPU_ID_AA64ISAR0;
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len = sizeof(isar0);
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if (sysctl(mib, 2, &isar0, &len, NULL, 0) != -1) {
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if (ID_AA64ISAR0_ATOMIC(isar0) >= ID_AA64ISAR0_ATOMIC_IMPL) {
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info |= CPUINFO_LSE;
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}
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if (ID_AA64ISAR0_AES(isar0) >= ID_AA64ISAR0_AES_BASE) {
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info |= CPUINFO_AES;
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}
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if (ID_AA64ISAR0_AES(isar0) >= ID_AA64ISAR0_AES_PMULL) {
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info |= CPUINFO_PMULL;
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}
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}
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mib[0] = CTL_MACHDEP;
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mib[1] = CPU_ID_AA64PFR1;
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len = sizeof(pfr1);
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if (sysctl(mib, 2, &pfr1, &len, NULL, 0) != -1) {
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if (ID_AA64PFR1_BT(pfr1) >= ID_AA64PFR1_BT_IMPL) {
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info |= CPUINFO_BTI;
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}
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}
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#endif
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cpuinfo = info;
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return info;
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