hw/dma/pl080: Allow use as embedded-struct device
Create a new include file for the pl081's device struct, type macros, etc, so that it can be instantiated using the "embedded struct" coding style. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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@ -445,6 +445,7 @@ F: hw/char/pl011.c
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F: include/hw/char/pl011.h
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F: hw/display/pl110*
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F: hw/dma/pl080.c
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F: include/hw/dma/pl080.h
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F: hw/dma/pl330.c
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F: hw/gpio/pl061.c
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F: hw/input/pl050.c
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@ -11,8 +11,8 @@
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#include "hw/sysbus.h"
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#include "exec/address-spaces.h"
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#include "qemu/log.h"
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#include "hw/dma/pl080.h"
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#define PL080_MAX_CHANNELS 8
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#define PL080_CONF_E 0x1
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#define PL080_CONF_M1 0x2
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#define PL080_CONF_M2 0x4
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@ -30,36 +30,6 @@
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#define PL080_CCTRL_D 0x02000000
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#define PL080_CCTRL_S 0x01000000
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typedef struct {
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uint32_t src;
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uint32_t dest;
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uint32_t lli;
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uint32_t ctrl;
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uint32_t conf;
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} pl080_channel;
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#define TYPE_PL080 "pl080"
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#define PL080(obj) OBJECT_CHECK(PL080State, (obj), TYPE_PL080)
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typedef struct PL080State {
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SysBusDevice parent_obj;
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MemoryRegion iomem;
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uint8_t tc_int;
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uint8_t tc_mask;
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uint8_t err_int;
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uint8_t err_mask;
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uint32_t conf;
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uint32_t sync;
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uint32_t req_single;
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uint32_t req_burst;
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pl080_channel chan[PL080_MAX_CHANNELS];
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int nchannels;
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/* Flag to avoid recursive DMA invocations. */
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int running;
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qemu_irq irq;
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} PL080State;
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static const VMStateDescription vmstate_pl080_channel = {
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.name = "pl080_channel",
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.version_id = 1,
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@ -408,7 +378,7 @@ static const TypeInfo pl080_info = {
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};
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static const TypeInfo pl081_info = {
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.name = "pl081",
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.name = TYPE_PL081,
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.parent = TYPE_PL080,
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.instance_init = pl081_init,
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};
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62
include/hw/dma/pl080.h
Normal file
62
include/hw/dma/pl080.h
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@ -0,0 +1,62 @@
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/*
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* ARM PrimeCell PL080/PL081 DMA controller
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*
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* Copyright (c) 2006 CodeSourcery.
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* Copyright (c) 2018 Linaro Limited
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* Written by Paul Brook, Peter Maydell
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 or
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* (at your option) any later version.
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*/
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/* This is a model of the Arm PrimeCell PL080/PL081 DMA controller:
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* The PL080 TRM is:
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* http://infocenter.arm.com/help/topic/com.arm.doc.ddi0196g/DDI0196.pdf
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* and the PL081 TRM is:
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* http://infocenter.arm.com/help/topic/com.arm.doc.ddi0218e/DDI0218.pdf
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*
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* QEMU interface:
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* + sysbus IRQ: DMACINTR combined interrupt line
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* + sysbus MMIO region 0: MemoryRegion for the device's registers
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*/
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#ifndef HW_DMA_PL080_H
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#define HW_DMA_PL080_H
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#include "hw/sysbus.h"
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#define PL080_MAX_CHANNELS 8
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typedef struct {
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uint32_t src;
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uint32_t dest;
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uint32_t lli;
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uint32_t ctrl;
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uint32_t conf;
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} pl080_channel;
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#define TYPE_PL080 "pl080"
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#define TYPE_PL081 "pl081"
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#define PL080(obj) OBJECT_CHECK(PL080State, (obj), TYPE_PL080)
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typedef struct PL080State {
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SysBusDevice parent_obj;
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MemoryRegion iomem;
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uint8_t tc_int;
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uint8_t tc_mask;
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uint8_t err_int;
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uint8_t err_mask;
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uint32_t conf;
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uint32_t sync;
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uint32_t req_single;
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uint32_t req_burst;
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pl080_channel chan[PL080_MAX_CHANNELS];
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int nchannels;
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/* Flag to avoid recursive DMA invocations. */
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int running;
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qemu_irq irq;
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} PL080State;
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#endif
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