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hw/dma/pl080: Allow use as embedded-struct device

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Create a new include file for the pl081's device struct,
type macros, etc, so that it can be instantiated using
the "embedded struct" coding style.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
This commit is contained in:
Peter Maydell 2018-08-20 11:24:33 +01:00
parent 514b4f361b
commit aa74e355f1
3 changed files with 65 additions and 32 deletions
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1
MAINTAINERS
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@ -445,6 +445,7 @@ F: hw/char/pl011.c
F: include/hw/char/pl011.h F: include/hw/char/pl011.h
F: hw/display/pl110* F: hw/display/pl110*
F: hw/dma/pl080.c F: hw/dma/pl080.c
F: include/hw/dma/pl080.h
F: hw/dma/pl330.c F: hw/dma/pl330.c
F: hw/gpio/pl061.c F: hw/gpio/pl061.c
F: hw/input/pl050.c F: hw/input/pl050.c

34
hw/dma/pl080.c
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@ -11,8 +11,8 @@
#include "hw/sysbus.h" #include "hw/sysbus.h"
#include "exec/address-spaces.h" #include "exec/address-spaces.h"
#include "qemu/log.h" #include "qemu/log.h"
#include "hw/dma/pl080.h"
#define PL080_MAX_CHANNELS 8
#define PL080_CONF_E 0x1 #define PL080_CONF_E 0x1
#define PL080_CONF_M1 0x2 #define PL080_CONF_M1 0x2
#define PL080_CONF_M2 0x4 #define PL080_CONF_M2 0x4
@ -30,36 +30,6 @@
#define PL080_CCTRL_D 0x02000000 #define PL080_CCTRL_D 0x02000000
#define PL080_CCTRL_S 0x01000000 #define PL080_CCTRL_S 0x01000000
typedef struct {
uint32_t src;
uint32_t dest;
uint32_t lli;
uint32_t ctrl;
uint32_t conf;
} pl080_channel;
#define TYPE_PL080 "pl080"
#define PL080(obj) OBJECT_CHECK(PL080State, (obj), TYPE_PL080)
typedef struct PL080State {
SysBusDevice parent_obj;
MemoryRegion iomem;
uint8_t tc_int;
uint8_t tc_mask;
uint8_t err_int;
uint8_t err_mask;
uint32_t conf;
uint32_t sync;
uint32_t req_single;
uint32_t req_burst;
pl080_channel chan[PL080_MAX_CHANNELS];
int nchannels;
/* Flag to avoid recursive DMA invocations. */
int running;
qemu_irq irq;
} PL080State;
static const VMStateDescription vmstate_pl080_channel = { static const VMStateDescription vmstate_pl080_channel = {
.name = "pl080_channel", .name = "pl080_channel",
.version_id = 1, .version_id = 1,
@ -408,7 +378,7 @@ static const TypeInfo pl080_info = {
}; };
static const TypeInfo pl081_info = { static const TypeInfo pl081_info = {
.name = "pl081", .name = TYPE_PL081,
.parent = TYPE_PL080, .parent = TYPE_PL080,
.instance_init = pl081_init, .instance_init = pl081_init,
}; };

62
include/hw/dma/pl080.h Normal file
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@ -0,0 +1,62 @@
/*
* ARM PrimeCell PL080/PL081 DMA controller
*
* Copyright (c) 2006 CodeSourcery.
* Copyright (c) 2018 Linaro Limited
* Written by Paul Brook, Peter Maydell
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 or
* (at your option) any later version.
*/
/* This is a model of the Arm PrimeCell PL080/PL081 DMA controller:
* The PL080 TRM is:
* http://infocenter.arm.com/help/topic/com.arm.doc.ddi0196g/DDI0196.pdf
* and the PL081 TRM is:
* http://infocenter.arm.com/help/topic/com.arm.doc.ddi0218e/DDI0218.pdf
*
* QEMU interface:
* + sysbus IRQ: DMACINTR combined interrupt line
* + sysbus MMIO region 0: MemoryRegion for the device's registers
*/
#ifndef HW_DMA_PL080_H
#define HW_DMA_PL080_H
#include "hw/sysbus.h"
#define PL080_MAX_CHANNELS 8
typedef struct {
uint32_t src;
uint32_t dest;
uint32_t lli;
uint32_t ctrl;
uint32_t conf;
} pl080_channel;
#define TYPE_PL080 "pl080"
#define TYPE_PL081 "pl081"
#define PL080(obj) OBJECT_CHECK(PL080State, (obj), TYPE_PL080)
typedef struct PL080State {
SysBusDevice parent_obj;
MemoryRegion iomem;
uint8_t tc_int;
uint8_t tc_mask;
uint8_t err_int;
uint8_t err_mask;
uint32_t conf;
uint32_t sync;
uint32_t req_single;
uint32_t req_burst;
pl080_channel chan[PL080_MAX_CHANNELS];
int nchannels;
/* Flag to avoid recursive DMA invocations. */
int running;
qemu_irq irq;
} PL080State;
#endif