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ppc/pegasos2: Fix reg property of ROM BARs

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The register offset of the ROM BAR is 0x30 not 0x28. This fixes the
reg property entry of the ROM region in the device tree.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-ID: <6abd73b1211f9d0776dfa5d71d6294f17eecb426.1689725688.git.balaton@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
This commit is contained in:
BALATON Zoltan 2023-07-19 02:32:55 +02:00 committed by Daniel Henrique Barboza
parent 19ac7b29f8
commit aa1133475e
1 changed files with 5 additions and 1 deletions
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6
hw/ppc/pegasos2.c
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@ -766,7 +766,11 @@ static void add_pci_device(PCIBus *bus, PCIDevice *d, void *opaque)
if (!d->io_regions[i].size) {
continue;
}
cells[j] = cpu_to_be32(d->devfn << 8 | (PCI_BASE_ADDRESS_0 + i * 4));
cells[j] = PCI_BASE_ADDRESS_0 + i * 4;
if (cells[j] == 0x28) {
cells[j] = 0x30;
}
cells[j] = cpu_to_be32(d->devfn << 8 | cells[j]);
if (d->io_regions[i].type & PCI_BASE_ADDRESS_SPACE_IO) {
cells[j] |= cpu_to_be32(1 << 24);
} else {