hw/mips/cps: create GCR block inside CPS
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
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@ -62,6 +62,8 @@ static void mips_cps_realize(DeviceState *dev, Error **errp)
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CPUMIPSState *env;
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MIPSCPU *cpu;
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int i;
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Error *err = NULL;
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target_ulong gcr_base;
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for (i = 0; i < s->num_vp; i++) {
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cpu = cpu_mips_init(s->cpu_model);
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@ -76,6 +78,27 @@ static void mips_cps_realize(DeviceState *dev, Error **errp)
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cpu_mips_clock_init(env);
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qemu_register_reset(main_cpu_reset, cpu);
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}
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cpu = MIPS_CPU(first_cpu);
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env = &cpu->env;
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/* Global Configuration Registers */
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gcr_base = env->CP0_CMGCRBase << 4;
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object_initialize(&s->gcr, sizeof(s->gcr), TYPE_MIPS_GCR);
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qdev_set_parent_bus(DEVICE(&s->gcr), sysbus_get_default());
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object_property_set_int(OBJECT(&s->gcr), s->num_vp, "num-vp", &err);
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object_property_set_int(OBJECT(&s->gcr), 0x800, "gcr-rev", &err);
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object_property_set_int(OBJECT(&s->gcr), gcr_base, "gcr-base", &err);
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object_property_set_bool(OBJECT(&s->gcr), true, "realized", &err);
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if (err != NULL) {
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error_propagate(errp, err);
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return;
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}
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memory_region_add_subregion(&s->container, gcr_base,
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sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->gcr), 0));
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}
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static Property mips_cps_properties[] = {
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@ -21,6 +21,7 @@
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#define MIPS_CPS_H
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#include "hw/sysbus.h"
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#include "hw/misc/mips_cmgcr.h"
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#define TYPE_MIPS_CPS "mips-cps"
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#define MIPS_CPS(obj) OBJECT_CHECK(MIPSCPSState, (obj), TYPE_MIPS_CPS)
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@ -33,6 +34,7 @@ typedef struct MIPSCPSState {
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char *cpu_model;
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MemoryRegion container;
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MIPSGCRState gcr;
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} MIPSCPSState;
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qemu_irq get_cps_irq(MIPSCPSState *cps, int pin_number);
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