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hw/ssi/xilinx_spips: Fix flash erase assert in dual parallel configuration

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Ensure that the FIFO is checked for emptiness before popping data
from it.  Previously, the code directly popped the data from the FIFO
without checking, which could cause an assertion failure:

../util/fifo8.c:67: fifo8_pop: Assertion `fifo->num > 0' failed.

Signed-off-by: Shiva sagar Myana <Shivasagar.Myana@amd.com>
Message-id: 20240924112035.1320865-1-Shivasagar.Myana@amd.com
Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com>
[PMM: tweaked commit message]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Shiva sagar Myana 2024-09-24 16:50:35 +05:30 committed by Peter Maydell
parent 67d762e716
commit a8cc14435e
1 changed files with 3 additions and 1 deletions
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4
hw/ssi/xilinx_spips.c
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@ -620,7 +620,9 @@ static void xilinx_spips_flush_txfifo(XilinxSPIPS *s)
} else if (s->snoop_state == SNOOP_STRIPING ||
s->snoop_state == SNOOP_NONE) {
for (i = 0; i < num_effective_busses(s); ++i) {
tx_rx[i] = fifo8_pop(&s->tx_fifo);
if (!fifo8_is_empty(&s->tx_fifo)) {
tx_rx[i] = fifo8_pop(&s->tx_fifo);
}
}
stripe8(tx_rx, num_effective_busses(s), false);
} else if (s->snoop_state >= SNOOP_ADDR) {