target-mips/translate.c: Update OPC_SYNCI
Update OPC_SYNCI with BS_STOP, in order to handle the instructions which saved in the same TB of the store instruction. Signed-off-by: Dongxue Zhang <elta.era@gmail.com> Reviewed-by: Yongbok Kim <yongbok.kim@imgtec.com> [leon.alrae@imgtec.com: update microMIPS SYNCI as well] Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
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@ -13190,6 +13190,9 @@ static void decode_micromips32_opc (CPUMIPSState *env, DisasContext *ctx,
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gen_logic_imm(ctx, OPC_LUI, rs, -1, imm);
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break;
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case SYNCI:
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/* Break the TB to be able to sync copied instructions
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immediately */
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ctx->bstate = BS_STOP;
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break;
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case BC2F:
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case BC2T:
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@ -16928,7 +16931,9 @@ static void decode_opc (CPUMIPSState *env, DisasContext *ctx)
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break;
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case OPC_SYNCI:
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check_insn(ctx, ISA_MIPS32R2);
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/* Treat as NOP. */
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/* Break the TB to be able to sync copied instructions
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immediately */
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ctx->bstate = BS_STOP;
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break;
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case OPC_BPOSGE32: /* MIPS DSP branch */
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#if defined(TARGET_MIPS64)
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