target/arm: Hoist address increment for vector memory ops
This can reduce the number of opcodes required for certain complex forms of load-multiple (e.g. ld4.16b). Signed-off-by: Richard Henderson <rth@twiddle.net> Message-id: 20181011205206.3552-2-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -3018,7 +3018,7 @@ static void disas_ldst_multiple_struct(DisasContext *s, uint32_t insn)
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bool is_store = !extract32(insn, 22, 1);
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bool is_postidx = extract32(insn, 23, 1);
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bool is_q = extract32(insn, 30, 1);
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TCGv_i64 tcg_addr, tcg_rn;
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TCGv_i64 tcg_addr, tcg_rn, tcg_ebytes;
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int ebytes = 1 << size;
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int elements = (is_q ? 128 : 64) / (8 << size);
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@ -3083,6 +3083,7 @@ static void disas_ldst_multiple_struct(DisasContext *s, uint32_t insn)
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tcg_rn = cpu_reg_sp(s, rn);
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tcg_addr = tcg_temp_new_i64();
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tcg_gen_mov_i64(tcg_addr, tcg_rn);
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tcg_ebytes = tcg_const_i64(ebytes);
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for (r = 0; r < rpt; r++) {
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int e;
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@ -3107,7 +3108,7 @@ static void disas_ldst_multiple_struct(DisasContext *s, uint32_t insn)
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clear_vec_high(s, is_q, tt);
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}
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}
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tcg_gen_addi_i64(tcg_addr, tcg_addr, ebytes);
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tcg_gen_add_i64(tcg_addr, tcg_addr, tcg_ebytes);
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tt = (tt + 1) % 32;
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}
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}
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@ -3121,6 +3122,7 @@ static void disas_ldst_multiple_struct(DisasContext *s, uint32_t insn)
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tcg_gen_add_i64(tcg_rn, tcg_rn, cpu_reg(s, rm));
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}
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}
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tcg_temp_free_i64(tcg_ebytes);
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tcg_temp_free_i64(tcg_addr);
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}
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@ -3163,7 +3165,7 @@ static void disas_ldst_single_struct(DisasContext *s, uint32_t insn)
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bool replicate = false;
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int index = is_q << 3 | S << 2 | size;
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int ebytes, xs;
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TCGv_i64 tcg_addr, tcg_rn;
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TCGv_i64 tcg_addr, tcg_rn, tcg_ebytes;
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switch (scale) {
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case 3:
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@ -3216,6 +3218,7 @@ static void disas_ldst_single_struct(DisasContext *s, uint32_t insn)
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tcg_rn = cpu_reg_sp(s, rn);
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tcg_addr = tcg_temp_new_i64();
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tcg_gen_mov_i64(tcg_addr, tcg_rn);
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tcg_ebytes = tcg_const_i64(ebytes);
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for (xs = 0; xs < selem; xs++) {
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if (replicate) {
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@ -3258,7 +3261,7 @@ static void disas_ldst_single_struct(DisasContext *s, uint32_t insn)
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do_vec_st(s, rt, index, tcg_addr, scale);
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}
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}
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tcg_gen_addi_i64(tcg_addr, tcg_addr, ebytes);
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tcg_gen_add_i64(tcg_addr, tcg_addr, tcg_ebytes);
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rt = (rt + 1) % 32;
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}
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@ -3270,6 +3273,7 @@ static void disas_ldst_single_struct(DisasContext *s, uint32_t insn)
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tcg_gen_add_i64(tcg_rn, tcg_rn, cpu_reg(s, rm));
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}
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}
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tcg_temp_free_i64(tcg_ebytes);
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tcg_temp_free_i64(tcg_addr);
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}
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