target-ppc: Some support for dumping TLB_EMB TLBs
Add mmubooke_dump_mmu(). TODO: Add printing of individual flags. Signed-off-by: François Revol <revol@free.fr> [agraf: fix coding style] Signed-off-by: Alexander Graf <agraf@suse.de>
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@ -1466,6 +1466,53 @@ static const char *book3e_tsize_to_str[32] = {
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"1T", "2T"
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};
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static void mmubooke_dump_mmu(FILE *f, fprintf_function cpu_fprintf,
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CPUPPCState *env)
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{
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ppcemb_tlb_t *entry;
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int i;
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if (kvm_enabled() && !env->kvm_sw_tlb) {
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cpu_fprintf(f, "Cannot access KVM TLB\n");
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return;
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}
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cpu_fprintf(f, "\nTLB:\n");
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cpu_fprintf(f, "Effective Physical Size PID Prot "
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"Attr\n");
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entry = &env->tlb.tlbe[0];
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for (i = 0; i < env->nb_tlb; i++, entry++) {
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target_phys_addr_t ea, pa;
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target_ulong mask;
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uint64_t size = (uint64_t)entry->size;
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char size_buf[20];
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/* Check valid flag */
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if (!(entry->prot & PAGE_VALID)) {
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continue;
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}
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mask = ~(entry->size - 1);
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ea = entry->EPN & mask;
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pa = entry->RPN & mask;
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#if (TARGET_PHYS_ADDR_BITS >= 36)
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/* Extend the physical address to 36 bits */
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pa |= (target_phys_addr_t)(entry->RPN & 0xF) << 32;
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#endif
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size /= 1024;
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if (size >= 1024) {
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snprintf(size_buf, sizeof(size_buf), "%3" PRId64 "M", size / 1024);
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} else {
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snprintf(size_buf, sizeof(size_buf), "%3" PRId64 "k", size);
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}
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cpu_fprintf(f, "0x%016" PRIx64 " 0x%016" PRIx64 " %s %-5u %08x %08x\n",
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(uint64_t)ea, (uint64_t)pa, size_buf, (uint32_t)entry->PID,
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entry->prot, entry->attr);
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}
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}
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static void mmubooke206_dump_one_tlb(FILE *f, fprintf_function cpu_fprintf,
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CPUPPCState *env, int tlbn, int offset,
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int tlbsize)
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@ -1561,6 +1608,9 @@ static void mmubooks_dump_mmu(FILE *f, fprintf_function cpu_fprintf,
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void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUPPCState *env)
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{
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switch (env->mmu_model) {
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case POWERPC_MMU_BOOKE:
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mmubooke_dump_mmu(f, cpu_fprintf, env);
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break;
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case POWERPC_MMU_BOOKE206:
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mmubooke206_dump_mmu(f, cpu_fprintf, env);
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break;
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