target/i386: Reorder DisasContext members
Sort all of the single-byte members to the same area of the structure, eliminating 8 bytes of padding. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210514151342.384376-29-richard.henderson@linaro.org>
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@ -76,20 +76,24 @@ static TCGv_i64 cpu_bndu[4];
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typedef struct DisasContext {
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DisasContextBase base;
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/* current insn context */
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int8_t override; /* -1 if no override, else R_CS, R_DS, etc */
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uint8_t prefix;
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target_ulong pc; /* pc = eip + cs_base */
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target_ulong pc_start; /* pc at TB entry */
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target_ulong cs_base; /* base of CS segment */
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MemOp aflag;
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MemOp dflag;
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target_ulong pc_start;
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target_ulong pc; /* pc = eip + cs_base */
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/* current block context */
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target_ulong cs_base; /* base of CS segment */
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int8_t override; /* -1 if no override, else R_CS, R_DS, etc */
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uint8_t prefix;
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#ifndef CONFIG_USER_ONLY
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uint8_t cpl; /* code priv level */
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uint8_t iopl; /* i/o priv level */
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#endif
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uint8_t vex_l; /* vex vector length */
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uint8_t vex_v; /* vex vvvv register, without 1's complement. */
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uint8_t popl_esp_hack; /* for correct popl with esp base handling */
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uint8_t rip_offset; /* only used in x86_64, but left for simplicity */
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#ifdef TARGET_X86_64
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uint8_t rex_r;
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@ -97,16 +101,13 @@ typedef struct DisasContext {
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uint8_t rex_b;
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bool rex_w;
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#endif
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uint8_t vex_l; /* vex vector length */
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uint8_t vex_v; /* vex vvvv register, without 1's complement. */
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CCOp cc_op; /* current CC operation */
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bool cc_op_dirty;
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bool jmp_opt; /* use direct block chaining for direct jumps */
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bool repz_opt; /* optimize jumps within repz instructions */
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bool cc_op_dirty;
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CCOp cc_op; /* current CC operation */
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int mem_index; /* select memory access functions */
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uint32_t flags; /* all execution flags */
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uint8_t popl_esp_hack; /* for correct popl with esp base handling */
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uint8_t rip_offset; /* only used in x86_64, but left for simplicity */
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int cpuid_features;
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int cpuid_ext_features;
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int cpuid_ext2_features;
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