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target/ppc: cpu_init: Deduplicate 745/755 SPR registration

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The 745 and 755 can share the HID registration, so move it all into
register_755_sprs, which applies for both CPUs.

Also rename that function to register_745_sprs, since the 745 is the
earliest of the two. This will help with separating 755-specific
registers in a subsequent patch.

Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Message-Id: <20220216162426.1885923-14-farosas@linux.ibm.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
This commit is contained in:
Fabiano Rosas 2022-02-18 08:34:15 +01:00 committed by Cédric Le Goater
parent 20f6fb99b2
commit a5d1120b1d
1 changed files with 19 additions and 31 deletions
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50
target/ppc/cpu_init.c
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@ -466,7 +466,7 @@ static void register_6xx_7xx_soft_tlb(CPUPPCState *env, int nb_tlbs, int nb_ways
#endif
}
static void register_755_sprs(CPUPPCState *env)
static void register_745_sprs(CPUPPCState *env)
{
/* SGPRs */
spr_register(env, SPR_SPRG4, "SPRG4",
@ -485,6 +485,22 @@ static void register_755_sprs(CPUPPCState *env)
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
0x00000000);
/* Hardware implementation registers */
spr_register(env, SPR_HID0, "HID0",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
0x00000000);
spr_register(env, SPR_HID1, "HID1",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
0x00000000);
spr_register(env, SPR_HID2, "HID2",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
0x00000000);
}
/* SPR common to all 7xx PowerPC implementations */
@ -4515,24 +4531,10 @@ static void init_proc_745(CPUPPCState *env)
register_ne_601_sprs(env);
register_sdr1_sprs(env);
register_7xx_sprs(env);
register_755_sprs(env);
register_745_sprs(env);
/* Thermal management */
register_thrm_sprs(env);
/* Hardware implementation registers */
spr_register(env, SPR_HID0, "HID0",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
0x00000000);
spr_register(env, SPR_HID1, "HID1",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
0x00000000);
spr_register(env, SPR_HID2, "HID2",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
0x00000000);
/* Memory management */
register_low_BATs(env);
register_high_BATs(env);
@ -4588,7 +4590,7 @@ static void init_proc_755(CPUPPCState *env)
register_ne_601_sprs(env);
register_sdr1_sprs(env);
register_7xx_sprs(env);
register_755_sprs(env);
register_745_sprs(env);
/* L2 cache control */
spr_register(env, SPR_L2CR, "L2CR",
SPR_NOACCESS, SPR_NOACCESS,
@ -4601,21 +4603,7 @@ static void init_proc_755(CPUPPCState *env)
0x00000000);
/* Thermal management */
register_thrm_sprs(env);
/* Hardware implementation registers */
spr_register(env, SPR_HID0, "HID0",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
0x00000000);
spr_register(env, SPR_HID1, "HID1",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
0x00000000);
spr_register(env, SPR_HID2, "HID2",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
0x00000000);
/* Memory management */
register_low_BATs(env);
register_high_BATs(env);