hw/pci: partially handle pci master abort
A MemoryRegion with negative priority was created and it spans over all the pci address space. It "intercepts" the accesses to unassigned pci address space and will follow the pci spec: 1. returns -1 on read 2. does nothing on write Note: setting the RECEIVED MASTER ABORT bit in the STATUS register of the device that initiated the transaction will be implemented in another series Signed-off-by: Marcel Apfelbaum <marcel.a@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
parent
8002ccd6e4
commit
a53ae8e934
26
hw/pci/pci.c
26
hw/pci/pci.c
@ -283,6 +283,24 @@ const char *pci_root_bus_path(PCIDevice *dev)
|
||||
return rootbus->qbus.name;
|
||||
}
|
||||
|
||||
static uint64_t master_abort_mem_read(void *opaque, hwaddr addr, unsigned size)
|
||||
{
|
||||
return -1ULL;
|
||||
}
|
||||
|
||||
static void master_abort_mem_write(void *opaque, hwaddr addr, uint64_t val,
|
||||
unsigned size)
|
||||
{
|
||||
}
|
||||
|
||||
static const MemoryRegionOps master_abort_mem_ops = {
|
||||
.read = master_abort_mem_read,
|
||||
.write = master_abort_mem_write,
|
||||
.endianness = DEVICE_LITTLE_ENDIAN,
|
||||
};
|
||||
|
||||
#define MASTER_ABORT_MEM_PRIORITY INT_MIN
|
||||
|
||||
static void pci_bus_init(PCIBus *bus, DeviceState *parent,
|
||||
const char *name,
|
||||
MemoryRegion *address_space_mem,
|
||||
@ -294,6 +312,14 @@ static void pci_bus_init(PCIBus *bus, DeviceState *parent,
|
||||
bus->address_space_mem = address_space_mem;
|
||||
bus->address_space_io = address_space_io;
|
||||
|
||||
|
||||
memory_region_init_io(&bus->master_abort_mem, OBJECT(bus),
|
||||
&master_abort_mem_ops, bus, "pci-master-abort",
|
||||
memory_region_size(bus->address_space_mem));
|
||||
memory_region_add_subregion_overlap(bus->address_space_mem,
|
||||
0, &bus->master_abort_mem,
|
||||
MASTER_ABORT_MEM_PRIORITY);
|
||||
|
||||
/* host bridge */
|
||||
QLIST_INIT(&bus->child);
|
||||
|
||||
|
@ -23,6 +23,7 @@ struct PCIBus {
|
||||
PCIDevice *parent_dev;
|
||||
MemoryRegion *address_space_mem;
|
||||
MemoryRegion *address_space_io;
|
||||
MemoryRegion master_abort_mem;
|
||||
|
||||
QLIST_HEAD(, PCIBus) child; /* this will be replaced by qdev later */
|
||||
QLIST_ENTRY(PCIBus) sibling;/* this will be replaced by qdev later */
|
||||
|
Loading…
Reference in New Issue
Block a user