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Fix for 32-bit MIPS.

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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4622 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
ths 2008-05-30 00:12:52 +00:00
parent 90cb786c41
commit a4a99d71b2
1 changed files with 9 additions and 8 deletions
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17
target-mips/translate.c
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@ -1904,15 +1904,16 @@ static void gen_muldiv (DisasContext *ctx, uint32_t opc,
{
TCGv r_tmp1 = tcg_temp_new(TCG_TYPE_I64);
TCGv r_tmp2 = tcg_temp_new(TCG_TYPE_I64);
TCGv r_tmp3 = tcg_temp_new(TCG_TYPE_I64);
tcg_gen_ext32s_tl(cpu_T[0], cpu_T[0]);
tcg_gen_ext32s_tl(cpu_T[1], cpu_T[1]);
tcg_gen_div_i64(r_tmp1, cpu_T[0], cpu_T[1]);
tcg_gen_rem_i64(r_tmp2, cpu_T[0], cpu_T[1]);
tcg_gen_ext32s_tl(r_tmp1, r_tmp1);
tcg_gen_ext32s_tl(r_tmp2, r_tmp2);
gen_store_LO(r_tmp1, 0);
gen_store_HI(r_tmp2, 0);
tcg_gen_ext_tl_i64(r_tmp1, cpu_T[0]);
tcg_gen_ext_tl_i64(r_tmp2, cpu_T[1]);
tcg_gen_div_i64(r_tmp3, r_tmp1, r_tmp2);
tcg_gen_rem_i64(r_tmp2, r_tmp1, r_tmp2);
tcg_gen_trunc_i64_tl(cpu_T[0], r_tmp3);
tcg_gen_trunc_i64_tl(cpu_T[1], r_tmp2);
gen_store_LO(cpu_T[0], 0);
gen_store_HI(cpu_T[1], 0);
}
gen_set_label(l1);
}