hw/arm/mps2-tz: Make SYSCLK frequency board-specific
The AN524 has a different SYSCLK frequency from the AN505 and AN521; make the SYSCLK frequency a field in the MPS2TZMachineClass rather than a compile-time constant so we can support the AN524. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210215115138.20465-2-peter.maydell@linaro.org
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@ -76,6 +76,7 @@ struct MPS2TZMachineClass {
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MachineClass parent;
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MPS2TZFPGAType fpga_type;
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uint32_t scc_id;
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uint32_t sysclk_frq; /* Main SYSCLK frequency in Hz */
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const char *armsse_type;
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};
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@ -111,8 +112,6 @@ struct MPS2TZMachineState {
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OBJECT_DECLARE_TYPE(MPS2TZMachineState, MPS2TZMachineClass, MPS2TZ_MACHINE)
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/* Main SYSCLK frequency in Hz */
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#define SYSCLK_FRQ 20000000
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/* Slow 32Khz S32KCLK frequency in Hz */
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#define S32KCLK_FRQ (32 * 1000)
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@ -186,6 +185,7 @@ static MemoryRegion *make_unimp_dev(MPS2TZMachineState *mms,
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static MemoryRegion *make_uart(MPS2TZMachineState *mms, void *opaque,
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const char *name, hwaddr size)
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{
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MPS2TZMachineClass *mmc = MPS2TZ_MACHINE_GET_CLASS(mms);
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CMSDKAPBUART *uart = opaque;
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int i = uart - &mms->uart[0];
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int rxirqno = i * 2;
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@ -196,7 +196,7 @@ static MemoryRegion *make_uart(MPS2TZMachineState *mms, void *opaque,
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object_initialize_child(OBJECT(mms), name, uart, TYPE_CMSDK_APB_UART);
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qdev_prop_set_chr(DEVICE(uart), "chardev", serial_hd(i));
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qdev_prop_set_uint32(DEVICE(uart), "pclk-frq", SYSCLK_FRQ);
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qdev_prop_set_uint32(DEVICE(uart), "pclk-frq", mmc->sysclk_frq);
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sysbus_realize(SYS_BUS_DEVICE(uart), &error_fatal);
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s = SYS_BUS_DEVICE(uart);
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sysbus_connect_irq(s, 0, get_sse_irq_in(mms, txirqno));
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@ -403,7 +403,7 @@ static void mps2tz_common_init(MachineState *machine)
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/* These clocks don't need migration because they are fixed-frequency */
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mms->sysclk = clock_new(OBJECT(machine), "SYSCLK");
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clock_set_hz(mms->sysclk, SYSCLK_FRQ);
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clock_set_hz(mms->sysclk, mmc->sysclk_frq);
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mms->s32kclk = clock_new(OBJECT(machine), "S32KCLK");
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clock_set_hz(mms->s32kclk, S32KCLK_FRQ);
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@ -670,6 +670,7 @@ static void mps2tz_an505_class_init(ObjectClass *oc, void *data)
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mmc->fpga_type = FPGA_AN505;
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mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m33");
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mmc->scc_id = 0x41045050;
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mmc->sysclk_frq = 20 * 1000 * 1000; /* 20MHz */
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mmc->armsse_type = TYPE_IOTKIT;
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}
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@ -685,6 +686,7 @@ static void mps2tz_an521_class_init(ObjectClass *oc, void *data)
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mmc->fpga_type = FPGA_AN521;
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mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m33");
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mmc->scc_id = 0x41045210;
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mmc->sysclk_frq = 20 * 1000 * 1000; /* 20MHz */
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mmc->armsse_type = TYPE_SSE200;
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}
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