s390x: refactor reset/reipl handling
Calling pause_all_vcpus()/resume_all_vcpus() from a VCPU thread might not be the best idea. As pause_all_vcpus() temporarily drops the qemu mutex, two parallel calls to pause_all_vcpus() can be active at a time, resulting in a deadlock. (either by two VCPUs or by the main thread and a VCPU) Let's handle it via the main loop instead, as suggested by Paolo. If we would have two parallel reset requests by two different VCPUs at the same time, the last one would win. We use the existing ipl device to handle it. The nice side effect is that we can get rid of reipl_requested. This change implies that all reset handling now goes via the common path, so "no-reboot" handling is now active for all kinds of reboots. Let's execute any CPU initialization code on the target CPU using run_on_cpu. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20180424101859.10239-1-david@redhat.com> Acked-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
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@ -26,6 +26,7 @@
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#include "qemu/config-file.h"
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#include "qemu/cutils.h"
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#include "qemu/option.h"
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#include "exec/exec-all.h"
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#define KERN_IMAGE_START 0x010000UL
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#define KERN_PARM_AREA 0x010480UL
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@ -488,12 +489,20 @@ IplParameterBlock *s390_ipl_get_iplb(void)
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return &ipl->iplb;
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}
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void s390_reipl_request(void)
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void s390_ipl_reset_request(CPUState *cs, enum s390_reset reset_type)
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{
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S390IPLState *ipl = get_ipl_device();
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ipl->reipl_requested = true;
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if (ipl->iplb_valid &&
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if (reset_type == S390_RESET_EXTERNAL || reset_type == S390_RESET_REIPL) {
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/* use CPU 0 for full resets */
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ipl->reset_cpu_index = 0;
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} else {
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ipl->reset_cpu_index = cs->cpu_index;
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}
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ipl->reset_type = reset_type;
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if (reset_type == S390_RESET_REIPL &&
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ipl->iplb_valid &&
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!ipl->netboot &&
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ipl->iplb.pbt == S390_IPL_TYPE_CCW &&
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is_virtio_scsi_device(&ipl->iplb)) {
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@ -510,6 +519,31 @@ void s390_reipl_request(void)
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}
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}
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qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
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/* as this is triggered by a CPU, make sure to exit the loop */
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if (tcg_enabled()) {
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cpu_loop_exit(cs);
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}
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}
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void s390_ipl_get_reset_request(CPUState **cs, enum s390_reset *reset_type)
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{
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S390IPLState *ipl = get_ipl_device();
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*cs = qemu_get_cpu(ipl->reset_cpu_index);
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if (!*cs) {
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/* use any CPU */
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*cs = first_cpu;
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}
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*reset_type = ipl->reset_type;
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}
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void s390_ipl_clear_reset_request(void)
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{
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S390IPLState *ipl = get_ipl_device();
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ipl->reset_type = S390_RESET_EXTERNAL;
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/* use CPU 0 for full resets */
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ipl->reset_cpu_index = 0;
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}
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static void s390_ipl_prepare_qipl(S390CPU *cpu)
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@ -556,11 +590,10 @@ static void s390_ipl_reset(DeviceState *dev)
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{
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S390IPLState *ipl = S390_IPL(dev);
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if (!ipl->reipl_requested) {
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if (ipl->reset_type != S390_RESET_REIPL) {
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ipl->iplb_valid = false;
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memset(&ipl->iplb, 0, sizeof(IplParameterBlock));
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}
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ipl->reipl_requested = false;
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}
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static void s390_ipl_class_init(ObjectClass *klass, void *data)
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@ -87,7 +87,17 @@ int s390_ipl_set_loadparm(uint8_t *loadparm);
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void s390_ipl_update_diag308(IplParameterBlock *iplb);
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void s390_ipl_prepare_cpu(S390CPU *cpu);
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IplParameterBlock *s390_ipl_get_iplb(void);
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void s390_reipl_request(void);
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enum s390_reset {
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/* default is a reset not triggered by a CPU e.g. issued by QMP */
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S390_RESET_EXTERNAL = 0,
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S390_RESET_REIPL,
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S390_RESET_MODIFIED_CLEAR,
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S390_RESET_LOAD_NORMAL,
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};
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void s390_ipl_reset_request(CPUState *cs, enum s390_reset reset_type);
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void s390_ipl_get_reset_request(CPUState **cs, enum s390_reset *reset_type);
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void s390_ipl_clear_reset_request(void);
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#define QIPL_ADDRESS 0xcc
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@ -129,9 +139,11 @@ struct S390IPLState {
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bool enforce_bios;
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IplParameterBlock iplb;
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bool iplb_valid;
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bool reipl_requested;
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bool netboot;
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QemuIplParameters qipl;
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/* reset related properties don't have to be migrated or reset */
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enum s390_reset reset_type;
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int reset_cpu_index;
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/*< public >*/
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char *kernel;
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@ -93,7 +93,7 @@ static const char *const reset_dev_types[] = {
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"diag288",
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};
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void subsystem_reset(void)
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static void subsystem_reset(void)
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{
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DeviceState *dev;
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int i;
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@ -381,17 +381,54 @@ static void s390_cpu_plug(HotplugHandler *hotplug_dev,
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}
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}
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static inline void s390_do_cpu_ipl(CPUState *cs, run_on_cpu_data arg)
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{
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S390CPU *cpu = S390_CPU(cs);
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s390_ipl_prepare_cpu(cpu);
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s390_cpu_set_state(S390_CPU_STATE_OPERATING, cpu);
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}
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static void s390_machine_reset(void)
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{
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S390CPU *ipl_cpu = S390_CPU(qemu_get_cpu(0));
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enum s390_reset reset_type;
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CPUState *cs, *t;
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/* get the reset parameters, reset them once done */
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s390_ipl_get_reset_request(&cs, &reset_type);
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/* all CPUs are paused and synchronized at this point */
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s390_cmma_reset();
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qemu_devices_reset();
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s390_crypto_reset();
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/* all cpus are stopped - configure and start the ipl cpu only */
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s390_ipl_prepare_cpu(ipl_cpu);
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s390_cpu_set_state(S390_CPU_STATE_OPERATING, ipl_cpu);
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switch (reset_type) {
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case S390_RESET_EXTERNAL:
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case S390_RESET_REIPL:
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qemu_devices_reset();
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s390_crypto_reset();
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/* configure and start the ipl CPU only */
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run_on_cpu(cs, s390_do_cpu_ipl, RUN_ON_CPU_NULL);
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break;
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case S390_RESET_MODIFIED_CLEAR:
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CPU_FOREACH(t) {
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run_on_cpu(t, s390_do_cpu_full_reset, RUN_ON_CPU_NULL);
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}
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subsystem_reset();
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s390_crypto_reset();
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run_on_cpu(cs, s390_do_cpu_load_normal, RUN_ON_CPU_NULL);
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break;
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case S390_RESET_LOAD_NORMAL:
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CPU_FOREACH(t) {
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run_on_cpu(t, s390_do_cpu_reset, RUN_ON_CPU_NULL);
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}
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subsystem_reset();
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run_on_cpu(cs, s390_do_cpu_initial_reset, RUN_ON_CPU_NULL);
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run_on_cpu(cs, s390_do_cpu_load_normal, RUN_ON_CPU_NULL);
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break;
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default:
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g_assert_not_reached();
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}
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s390_ipl_clear_reset_request();
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}
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static void s390_machine_device_plug(HotplugHandler *hotplug_dev,
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@ -53,6 +53,4 @@ bool cpu_model_allowed(void);
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*/
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bool css_migration_enabled(void);
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void subsystem_reset(void);
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#endif
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@ -686,6 +686,32 @@ static inline uint64_t s390_build_validity_mcic(void)
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return mcic;
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}
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static inline void s390_do_cpu_full_reset(CPUState *cs, run_on_cpu_data arg)
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{
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cpu_reset(cs);
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}
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static inline void s390_do_cpu_reset(CPUState *cs, run_on_cpu_data arg)
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{
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S390CPUClass *scc = S390_CPU_GET_CLASS(cs);
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scc->cpu_reset(cs);
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}
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static inline void s390_do_cpu_initial_reset(CPUState *cs, run_on_cpu_data arg)
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{
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S390CPUClass *scc = S390_CPU_GET_CLASS(cs);
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scc->initial_cpu_reset(cs);
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}
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static inline void s390_do_cpu_load_normal(CPUState *cs, run_on_cpu_data arg)
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{
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S390CPUClass *scc = S390_CPU_GET_CLASS(cs);
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scc->load_normal(cs);
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}
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/* cpu.c */
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int s390_get_clock(uint8_t *tod_high, uint64_t *tod_low);
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@ -22,51 +22,6 @@
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#include "hw/s390x/ipl.h"
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#include "hw/s390x/s390-virtio-ccw.h"
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static int modified_clear_reset(S390CPU *cpu)
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{
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S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
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CPUState *t;
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pause_all_vcpus();
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cpu_synchronize_all_states();
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CPU_FOREACH(t) {
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run_on_cpu(t, s390_do_cpu_full_reset, RUN_ON_CPU_NULL);
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}
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s390_cmma_reset();
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subsystem_reset();
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s390_crypto_reset();
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scc->load_normal(CPU(cpu));
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cpu_synchronize_all_post_reset();
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resume_all_vcpus();
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return 0;
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}
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static inline void s390_do_cpu_reset(CPUState *cs, run_on_cpu_data arg)
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{
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S390CPUClass *scc = S390_CPU_GET_CLASS(cs);
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scc->cpu_reset(cs);
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}
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static int load_normal_reset(S390CPU *cpu)
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{
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S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
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CPUState *t;
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pause_all_vcpus();
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cpu_synchronize_all_states();
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CPU_FOREACH(t) {
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run_on_cpu(t, s390_do_cpu_reset, RUN_ON_CPU_NULL);
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}
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s390_cmma_reset();
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subsystem_reset();
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scc->initial_cpu_reset(CPU(cpu));
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scc->load_normal(CPU(cpu));
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cpu_synchronize_all_post_reset();
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resume_all_vcpus();
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return 0;
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}
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int handle_diag_288(CPUS390XState *env, uint64_t r1, uint64_t r3)
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{
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uint64_t func = env->regs[r1];
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@ -101,6 +56,7 @@ int handle_diag_288(CPUS390XState *env, uint64_t r1, uint64_t r3)
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void handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3, uintptr_t ra)
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{
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CPUState *cs = CPU(s390_env_get_cpu(env));
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uint64_t addr = env->regs[r1];
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uint64_t subcode = env->regs[r3];
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IplParameterBlock *iplb;
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@ -117,22 +73,13 @@ void handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3, uintptr_t ra)
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switch (subcode) {
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case 0:
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modified_clear_reset(s390_env_get_cpu(env));
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if (tcg_enabled()) {
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cpu_loop_exit(CPU(s390_env_get_cpu(env)));
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}
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s390_ipl_reset_request(cs, S390_RESET_MODIFIED_CLEAR);
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break;
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case 1:
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load_normal_reset(s390_env_get_cpu(env));
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if (tcg_enabled()) {
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cpu_loop_exit(CPU(s390_env_get_cpu(env)));
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}
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s390_ipl_reset_request(cs, S390_RESET_LOAD_NORMAL);
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break;
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case 3:
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s390_reipl_request();
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if (tcg_enabled()) {
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cpu_loop_exit(CPU(s390_env_get_cpu(env)));
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}
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s390_ipl_reset_request(cs, S390_RESET_REIPL);
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break;
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case 5:
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if ((r1 & 1) || (addr & 0x0fffULL)) {
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@ -273,12 +273,6 @@ static inline hwaddr decode_basedisp_s(CPUS390XState *env, uint32_t ipb,
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/* Base/displacement are at the same locations. */
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#define decode_basedisp_rs decode_basedisp_s
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static inline void s390_do_cpu_full_reset(CPUState *cs, run_on_cpu_data arg)
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{
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cpu_reset(cs);
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}
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/* arch_dump.c */
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int s390_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs,
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int cpuid, void *opaque);
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ret = handle_intercept(cpu);
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break;
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case KVM_EXIT_S390_RESET:
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s390_reipl_request();
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s390_ipl_reset_request(cs, S390_RESET_REIPL);
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break;
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case KVM_EXIT_S390_TSCH:
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ret = handle_tsch(cpu);
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