ppc64 target
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1523 c046a42c-6fe2-441c-8c8c-71466251a162
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b1fc0348b1
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a2458627f9
@ -4,6 +4,9 @@ TARGET_BASE_ARCH:=$(TARGET_ARCH)
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ifeq ($(TARGET_ARCH), x86_64)
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ifeq ($(TARGET_ARCH), x86_64)
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TARGET_BASE_ARCH:=i386
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TARGET_BASE_ARCH:=i386
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endif
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endif
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ifeq ($(TARGET_ARCH), ppc64)
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TARGET_BASE_ARCH:=ppc
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endif
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ifeq ($(TARGET_ARCH), sparc64)
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ifeq ($(TARGET_ARCH), sparc64)
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TARGET_BASE_ARCH:=sparc
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TARGET_BASE_ARCH:=sparc
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endif
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endif
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@ -195,7 +198,7 @@ ifeq ($(TARGET_ARCH), x86_64)
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LIBOBJS+=helper.o helper2.o
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LIBOBJS+=helper.o helper2.o
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endif
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endif
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ifeq ($(TARGET_ARCH), ppc)
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ifeq ($(TARGET_BASE_ARCH), ppc)
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LIBOBJS+= op_helper.o helper.o
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LIBOBJS+= op_helper.o helper.o
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endif
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endif
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@ -225,7 +228,7 @@ endif
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ifeq ($(findstring alpha, $(TARGET_ARCH) $(ARCH)),alpha)
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ifeq ($(findstring alpha, $(TARGET_ARCH) $(ARCH)),alpha)
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LIBOBJS+=alpha-dis.o
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LIBOBJS+=alpha-dis.o
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endif
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endif
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ifeq ($(findstring ppc, $(TARGET_ARCH) $(ARCH)),ppc)
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ifeq ($(findstring ppc, $(TARGET_BASE_ARCH) $(ARCH)),ppc)
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LIBOBJS+=ppc-dis.o
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LIBOBJS+=ppc-dis.o
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endif
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endif
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ifeq ($(findstring mips, $(TARGET_ARCH) $(ARCH)),mips)
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ifeq ($(findstring mips, $(TARGET_ARCH) $(ARCH)),mips)
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@ -286,7 +289,7 @@ VL_OBJS+= ide.o ne2000.o pckbd.o vga.o $(SOUND_HW) dma.o $(AUDIODRV)
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VL_OBJS+= fdc.o mc146818rtc.o serial.o i8259.o i8254.o pc.o
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VL_OBJS+= fdc.o mc146818rtc.o serial.o i8259.o i8254.o pc.o
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VL_OBJS+= cirrus_vga.o mixeng.o apic.o parallel.o
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VL_OBJS+= cirrus_vga.o mixeng.o apic.o parallel.o
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endif
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endif
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ifeq ($(TARGET_ARCH), ppc)
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ifeq ($(TARGET_BASE_ARCH), ppc)
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VL_OBJS+= ppc.o ide.o ne2000.o pckbd.o vga.o $(SOUND_HW) dma.o $(AUDIODRV)
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VL_OBJS+= ppc.o ide.o ne2000.o pckbd.o vga.o $(SOUND_HW) dma.o $(AUDIODRV)
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VL_OBJS+= mc146818rtc.o serial.o i8259.o i8254.o fdc.o m48t59.o
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VL_OBJS+= mc146818rtc.o serial.o i8259.o i8254.o fdc.o m48t59.o
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VL_OBJS+= ppc_prep.o ppc_chrp.o cuda.o adb.o openpic.o heathrow_pic.o mixeng.o
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VL_OBJS+= ppc_prep.o ppc_chrp.o cuda.o adb.o openpic.o heathrow_pic.o mixeng.o
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@ -400,7 +403,7 @@ op.o: op.c op_template.h op_mem.h fop_template.h fbranch_template.h
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magic_load.o: elf_op.h
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magic_load.o: elf_op.h
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endif
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endif
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ifeq ($(TARGET_ARCH), ppc)
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ifeq ($(TARGET_BASE_ARCH), ppc)
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op.o: op.c op_template.h op_mem.h
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op.o: op.c op_template.h op_mem.h
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op_helper.o: op_helper_mem.h
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op_helper.o: op_helper_mem.h
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translate.o: translate.c translate_init.c
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translate.o: translate.c translate_init.c
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6
configure
vendored
6
configure
vendored
@ -611,6 +611,7 @@ target_bigendian="no"
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[ "$target_cpu" = "sparc" ] && target_bigendian=yes
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[ "$target_cpu" = "sparc" ] && target_bigendian=yes
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[ "$target_cpu" = "sparc64" ] && target_bigendian=yes
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[ "$target_cpu" = "sparc64" ] && target_bigendian=yes
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[ "$target_cpu" = "ppc" ] && target_bigendian=yes
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[ "$target_cpu" = "ppc" ] && target_bigendian=yes
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[ "$target_cpu" = "ppc64" ] && target_bigendian=yes
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[ "$target_cpu" = "mips" ] && target_bigendian=yes
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[ "$target_cpu" = "mips" ] && target_bigendian=yes
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target_softmmu="no"
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target_softmmu="no"
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if expr $target : '.*-softmmu' > /dev/null ; then
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if expr $target : '.*-softmmu' > /dev/null ; then
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@ -676,6 +677,11 @@ elif test "$target_cpu" = "ppc" ; then
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echo "TARGET_ARCH=ppc" >> $config_mak
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echo "TARGET_ARCH=ppc" >> $config_mak
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echo "#define TARGET_ARCH \"ppc\"" >> $config_h
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echo "#define TARGET_ARCH \"ppc\"" >> $config_h
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echo "#define TARGET_PPC 1" >> $config_h
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echo "#define TARGET_PPC 1" >> $config_h
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elif test "$target_cpu" = "ppc64" ; then
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echo "TARGET_ARCH=ppc64" >> $config_mak
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echo "#define TARGET_ARCH \"ppc64\"" >> $config_h
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echo "#define TARGET_PPC 1" >> $config_h
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echo "#define TARGET_PPC64 1" >> $config_h
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elif test "$target_cpu" = "x86_64" ; then
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elif test "$target_cpu" = "x86_64" ; then
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echo "TARGET_ARCH=x86_64" >> $config_mak
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echo "TARGET_ARCH=x86_64" >> $config_mak
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echo "#define TARGET_ARCH \"x86_64\"" >> $config_h
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echo "#define TARGET_ARCH \"x86_64\"" >> $config_h
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18
dis-asm.h
18
dis-asm.h
@ -126,6 +126,24 @@ enum bfd_architecture
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#define bfd_mach_h8300h 2
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#define bfd_mach_h8300h 2
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#define bfd_mach_h8300s 3
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#define bfd_mach_h8300s 3
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bfd_arch_powerpc, /* PowerPC */
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bfd_arch_powerpc, /* PowerPC */
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#define bfd_mach_ppc 0
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#define bfd_mach_ppc64 1
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#define bfd_mach_ppc_403 403
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#define bfd_mach_ppc_403gc 4030
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#define bfd_mach_ppc_505 505
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#define bfd_mach_ppc_601 601
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#define bfd_mach_ppc_602 602
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#define bfd_mach_ppc_603 603
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#define bfd_mach_ppc_ec603e 6031
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#define bfd_mach_ppc_604 604
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#define bfd_mach_ppc_620 620
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#define bfd_mach_ppc_630 630
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#define bfd_mach_ppc_750 750
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#define bfd_mach_ppc_860 860
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#define bfd_mach_ppc_a35 35
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#define bfd_mach_ppc_rs64ii 642
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#define bfd_mach_ppc_rs64iii 643
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#define bfd_mach_ppc_7400 7400
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bfd_arch_rs6000, /* IBM RS/6000 */
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bfd_arch_rs6000, /* IBM RS/6000 */
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bfd_arch_hppa, /* HP PA RISC */
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bfd_arch_hppa, /* HP PA RISC */
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bfd_arch_d10v, /* Mitsubishi D10V */
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bfd_arch_d10v, /* Mitsubishi D10V */
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10
disas.c
10
disas.c
@ -179,6 +179,11 @@ void target_disas(FILE *out, target_ulong code, target_ulong size, int flags)
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#elif defined(TARGET_PPC)
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#elif defined(TARGET_PPC)
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if (cpu_single_env->msr[MSR_LE])
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if (cpu_single_env->msr[MSR_LE])
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disasm_info.endian = BFD_ENDIAN_LITTLE;
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disasm_info.endian = BFD_ENDIAN_LITTLE;
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#ifdef TARGET_PPC64
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disasm_info.mach = bfd_mach_ppc64;
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#else
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disasm_info.mach = bfd_mach_ppc;
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#endif
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print_insn = print_insn_ppc;
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print_insn = print_insn_ppc;
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#elif defined(TARGET_MIPS)
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#elif defined(TARGET_MIPS)
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print_insn = print_insn_big_mips;
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print_insn = print_insn_big_mips;
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@ -355,6 +360,11 @@ void monitor_disas(target_ulong pc, int nb_insn, int is_physical, int flags)
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#elif defined(TARGET_SPARC)
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#elif defined(TARGET_SPARC)
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print_insn = print_insn_sparc;
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print_insn = print_insn_sparc;
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#elif defined(TARGET_PPC)
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#elif defined(TARGET_PPC)
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#ifdef TARGET_PPC64
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disasm_info.mach = bfd_mach_ppc64;
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#else
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disasm_info.mach = bfd_mach_ppc;
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#endif
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print_insn = print_insn_ppc;
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print_insn = print_insn_ppc;
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#elif defined(TARGET_MIPS)
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#elif defined(TARGET_MIPS)
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print_insn = print_insn_big_mips;
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print_insn = print_insn_big_mips;
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@ -3084,8 +3084,13 @@ int print_insn_ppc (bfd_vma pc, disassemble_info *info)
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opc = bfd_getb32(buf);
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opc = bfd_getb32(buf);
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else
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else
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opc = bfd_getl32(buf);
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opc = bfd_getl32(buf);
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if (info->mach == bfd_mach_ppc64) {
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return print_insn_powerpc (info, opc, pc,
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PPC | B64);
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} else {
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return print_insn_powerpc (info, opc, pc,
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return print_insn_powerpc (info, opc, pc,
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PPC | B32 | M601);
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PPC | B32 | M601);
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}
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}
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}
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/* Print a PowerPC or POWER instruction. */
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/* Print a PowerPC or POWER instruction. */
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