riscv: hw: Change to use qemu_log_mask(LOG_GUEST_ERROR, ...) instead
Replace the call to hw_error() with qemu_log_mask(LOG_GUEST_ERROR,...) in various sifive models. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
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@ -20,6 +20,7 @@
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#include "qemu/osdep.h"
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#include "hw/sysbus.h"
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#include "qemu/log.h"
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#include "qemu/module.h"
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#include "target/riscv/cpu.h"
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#include "hw/hw.h"
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@ -38,7 +39,8 @@ static uint64_t sifive_prci_read(void *opaque, hwaddr addr, unsigned int size)
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case SIFIVE_PRCI_PLLOUTDIV:
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return s->plloutdiv;
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}
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hw_error("%s: read: addr=0x%x\n", __func__, (int)addr);
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qemu_log_mask(LOG_GUEST_ERROR, "%s: read: addr=0x%x\n",
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__func__, (int)addr);
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return 0;
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}
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@ -66,8 +68,8 @@ static void sifive_prci_write(void *opaque, hwaddr addr,
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s->plloutdiv = (uint32_t) val64;
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break;
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default:
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hw_error("%s: bad write: addr=0x%x v=0x%x\n",
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__func__, (int)addr, (int)val64);
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qemu_log_mask(LOG_GUEST_ERROR, "%s: bad write: addr=0x%x v=0x%x\n",
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__func__, (int)addr, (int)val64);
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}
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}
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@ -20,6 +20,7 @@
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#include "qemu/osdep.h"
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#include "hw/sysbus.h"
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#include "qemu/log.h"
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#include "qemu/module.h"
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#include "sysemu/runstate.h"
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#include "target/riscv/cpu.h"
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@ -49,8 +50,8 @@ static void sifive_test_write(void *opaque, hwaddr addr,
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break;
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}
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}
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hw_error("%s: write: addr=0x%x val=0x%016" PRIx64 "\n",
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__func__, (int)addr, val64);
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qemu_log_mask(LOG_GUEST_ERROR, "%s: write: addr=0x%x val=0x%016" PRIx64 "\n",
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__func__, (int)addr, val64);
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}
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static const MemoryRegionOps sifive_test_ops = {
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@ -18,6 +18,7 @@
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "qemu/log.h"
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#include "hw/sysbus.h"
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#include "chardev/char.h"
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#include "chardev/char-fe.h"
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@ -95,8 +96,8 @@ uart_read(void *opaque, hwaddr addr, unsigned int size)
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return s->div;
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}
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hw_error("%s: bad read: addr=0x%x\n",
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__func__, (int)addr);
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qemu_log_mask(LOG_GUEST_ERROR, "%s: bad read: addr=0x%x\n",
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__func__, (int)addr);
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return 0;
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}
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@ -127,8 +128,8 @@ uart_write(void *opaque, hwaddr addr,
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s->div = val64;
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return;
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}
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hw_error("%s: bad write: addr=0x%x v=0x%x\n",
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__func__, (int)addr, (int)value);
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qemu_log_mask(LOG_GUEST_ERROR, "%s: bad write: addr=0x%x v=0x%x\n",
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__func__, (int)addr, (int)value);
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}
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static const MemoryRegionOps uart_ops = {
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