armv7m_nvic: Use qemu_get_cpu(0) instead of current_cpu
Starting QEMU with -S results in current_cpu containing its initial value of NULL. It is however possible to connect to such QEMU instance and query various CPU registers, one example being CPUID, and doing that results in QEMU segfaulting. Using qemu_get_cpu(0) seem reasonable enough given that ARMv7M architecture is a single core architecture. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -187,11 +187,11 @@ static uint32_t nvic_readl(nvic_state *s, uint32_t offset)
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case 0x1c: /* SysTick Calibration Value. */
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return 10000;
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case 0xd00: /* CPUID Base. */
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cpu = ARM_CPU(current_cpu);
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cpu = ARM_CPU(qemu_get_cpu(0));
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return cpu->midr;
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case 0xd04: /* Interrupt Control State. */
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/* VECTACTIVE */
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cpu = ARM_CPU(current_cpu);
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cpu = ARM_CPU(qemu_get_cpu(0));
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val = cpu->env.v7m.exception;
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if (val == 1023) {
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val = 0;
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@ -222,7 +222,7 @@ static uint32_t nvic_readl(nvic_state *s, uint32_t offset)
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val |= (1 << 31);
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return val;
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case 0xd08: /* Vector Table Offset. */
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cpu = ARM_CPU(current_cpu);
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cpu = ARM_CPU(qemu_get_cpu(0));
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return cpu->env.v7m.vecbase;
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case 0xd0c: /* Application Interrupt/Reset Control. */
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return 0xfa050000;
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@ -349,7 +349,7 @@ static void nvic_writel(nvic_state *s, uint32_t offset, uint32_t value)
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}
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break;
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case 0xd08: /* Vector Table Offset. */
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cpu = ARM_CPU(current_cpu);
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cpu = ARM_CPU(qemu_get_cpu(0));
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cpu->env.v7m.vecbase = value & 0xffffff80;
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break;
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case 0xd0c: /* Application Interrupt/Reset Control. */
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