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PowerPC coding style and inlining fixes.

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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3461 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
j_mayer 2007-10-28 00:55:05 +00:00
parent 5bda28432f
commit a11b8151df
3 changed files with 46 additions and 42 deletions
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48
target-ppc/helper.c
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@ -232,21 +232,23 @@ static always_inline int _pte_check (mmu_ctx_t *ctx, int is_64b,
return ret;
}
static int pte32_check (mmu_ctx_t *ctx, target_ulong pte0, target_ulong pte1,
static always_inline int pte32_check (mmu_ctx_t *ctx,
target_ulong pte0, target_ulong pte1,
int h, int rw, int type)
{
return _pte_check(ctx, 0, pte0, pte1, h, rw, type);
}
#if defined(TARGET_PPC64)
static int pte64_check (mmu_ctx_t *ctx, target_ulong pte0, target_ulong pte1,
static always_inline int pte64_check (mmu_ctx_t *ctx,
target_ulong pte0, target_ulong pte1,
int h, int rw, int type)
{
return _pte_check(ctx, 1, pte0, pte1, h, rw, type);
}
#endif
static int pte_update_flags (mmu_ctx_t *ctx, target_ulong *pte1p,
static always_inline int pte_update_flags (mmu_ctx_t *ctx, target_ulong *pte1p,
int ret, int rw)
{
int store = 0;
@ -272,7 +274,7 @@ static int pte_update_flags (mmu_ctx_t *ctx, target_ulong *pte1p,
}
/* Software driven TLB helpers */
static int ppc6xx_tlb_getnum (CPUState *env, target_ulong eaddr,
static always_inline int ppc6xx_tlb_getnum (CPUState *env, target_ulong eaddr,
int way, int is_code)
{
int nr;
@ -288,7 +290,7 @@ static int ppc6xx_tlb_getnum (CPUState *env, target_ulong eaddr,
return nr;
}
static void ppc6xx_tlb_invalidate_all (CPUState *env)
static always_inline void ppc6xx_tlb_invalidate_all (CPUState *env)
{
ppc6xx_tlb_t *tlb;
int nr, max;
@ -339,7 +341,8 @@ static always_inline void __ppc6xx_tlb_invalidate_virt (CPUState *env,
#endif
}
static void ppc6xx_tlb_invalidate_virt (CPUState *env, target_ulong eaddr,
static always_inline void ppc6xx_tlb_invalidate_virt (CPUState *env,
target_ulong eaddr,
int is_code)
{
__ppc6xx_tlb_invalidate_virt(env, eaddr, is_code, 0);
@ -368,8 +371,9 @@ void ppc6xx_tlb_store (CPUState *env, target_ulong EPN, int way, int is_code,
env->last_way = way;
}
static int ppc6xx_tlb_check (CPUState *env, mmu_ctx_t *ctx,
target_ulong eaddr, int rw, int access_type)
static always_inline int ppc6xx_tlb_check (CPUState *env, mmu_ctx_t *ctx,
target_ulong eaddr, int rw,
int access_type)
{
ppc6xx_tlb_t *tlb;
int nr, best, way;
@ -444,7 +448,7 @@ static int ppc6xx_tlb_check (CPUState *env, mmu_ctx_t *ctx,
}
/* Perform BAT hit & translation */
static int get_bat (CPUState *env, mmu_ctx_t *ctx,
static always_inline int get_bat (CPUState *env, mmu_ctx_t *ctx,
target_ulong virtual, int rw, int type)
{
target_ulong *BATlt, *BATut, *BATu, *BATl;
@ -635,13 +639,13 @@ static always_inline int _find_pte (mmu_ctx_t *ctx, int is_64b, int h,
return ret;
}
static int find_pte32 (mmu_ctx_t *ctx, int h, int rw, int type)
static always_inline int find_pte32 (mmu_ctx_t *ctx, int h, int rw, int type)
{
return _find_pte(ctx, 0, h, rw, type);
}
#if defined(TARGET_PPC64)
static int find_pte64 (mmu_ctx_t *ctx, int h, int rw, int type)
static always_inline int find_pte64 (mmu_ctx_t *ctx, int h, int rw, int type)
{
return _find_pte(ctx, 1, h, rw, type);
}
@ -659,18 +663,19 @@ static always_inline int find_pte (CPUState *env, mmu_ctx_t *ctx,
}
#if defined(TARGET_PPC64)
static inline int slb_is_valid (uint64_t slb64)
static always_inline int slb_is_valid (uint64_t slb64)
{
return slb64 & 0x0000000008000000ULL ? 1 : 0;
}
static inline void slb_invalidate (uint64_t *slb64)
static always_inline void slb_invalidate (uint64_t *slb64)
{
*slb64 &= ~0x0000000008000000ULL;
}
static int slb_lookup (CPUPPCState *env, target_ulong eaddr,
target_ulong *vsid, target_ulong *page_mask, int *attr)
static always_inline int slb_lookup (CPUPPCState *env, target_ulong eaddr,
target_ulong *vsid,
target_ulong *page_mask, int *attr)
{
target_phys_addr_t sr_base;
target_ulong mask;
@ -847,7 +852,7 @@ static always_inline target_phys_addr_t get_pgaddr (target_phys_addr_t sdr1,
return (sdr1 & ((target_ulong)(-1ULL) << sdr_sh)) | (hash & mask);
}
static int get_segment (CPUState *env, mmu_ctx_t *ctx,
static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx,
target_ulong eaddr, int rw, int type)
{
target_phys_addr_t sdr, hash, mask, sdr_mask, htab_mask;
@ -1063,7 +1068,7 @@ static int get_segment (CPUState *env, mmu_ctx_t *ctx,
}
/* Generic TLB check function for embedded PowerPC implementations */
static int ppcemb_tlb_check (CPUState *env, ppcemb_tlb_t *tlb,
static always_inline int ppcemb_tlb_check (CPUState *env, ppcemb_tlb_t *tlb,
target_phys_addr_t *raddrp,
target_ulong address,
uint32_t pid, int ext, int i)
@ -1122,7 +1127,7 @@ int ppcemb_tlb_search (CPUPPCState *env, target_ulong address, uint32_t pid)
}
/* Helpers specific to PowerPC 40x implementations */
static void ppc4xx_tlb_invalidate_all (CPUState *env)
static always_inline void ppc4xx_tlb_invalidate_all (CPUState *env)
{
ppcemb_tlb_t *tlb;
int i;
@ -1134,7 +1139,8 @@ static void ppc4xx_tlb_invalidate_all (CPUState *env)
tlb_flush(env, 1);
}
static void ppc4xx_tlb_invalidate_virt (CPUState *env, target_ulong eaddr,
static always_inline void ppc4xx_tlb_invalidate_virt (CPUState *env,
target_ulong eaddr,
uint32_t pid)
{
#if !defined(FLUSH_ALL_TLBS)
@ -1286,7 +1292,7 @@ int mmubooke_get_physical_address (CPUState *env, mmu_ctx_t *ctx,
return ret;
}
static int check_physical (CPUState *env, mmu_ctx_t *ctx,
static always_inline int check_physical (CPUState *env, mmu_ctx_t *ctx,
target_ulong eaddr, int rw)
{
int in_plb, ret;
@ -1986,7 +1992,7 @@ void ppc_hw_interrupt (CPUState *env)
env->error_code = 0;
}
#else /* defined (CONFIG_USER_ONLY) */
static void dump_syscall (CPUState *env)
static always_inline void dump_syscall (CPUState *env)
{
fprintf(logfile, "syscall r0=0x" REGX " r3=0x" REGX " r4=0x" REGX
" r5=0x" REGX " r6=0x" REGX " nip=0x" ADDRX "\n",

13
target-ppc/op_helper.c
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@ -474,7 +474,7 @@ void do_popcntb_64 (void)
/*****************************************************************************/
/* Floating point operations helpers */
static inline int fpisneg (float64 f)
static always_inline int fpisneg (float64 f)
{
union {
float64 f;
@ -486,7 +486,7 @@ static inline int fpisneg (float64 f)
return u.u >> 63 != 0;
}
static inline int isden (float f)
static always_inline int isden (float f)
{
union {
float64 f;
@ -498,7 +498,7 @@ static inline int isden (float f)
return ((u.u >> 52) & 0x7FF) == 0;
}
static inline int iszero (float64 f)
static always_inline int iszero (float64 f)
{
union {
float64 f;
@ -510,7 +510,7 @@ static inline int iszero (float64 f)
return (u.u & ~0x8000000000000000ULL) == 0;
}
static inline int isinfinity (float64 f)
static always_inline int isinfinity (float64 f)
{
union {
float64 f;
@ -662,7 +662,6 @@ static always_inline void float_zero_divide_excp (void)
uint64_t u;
} u0, u1;
env->fpscr |= 1 << FPSCR_ZX;
env->fpscr &= ~((1 << FPSCR_FR) | (1 << FPSCR_FI));
/* Update the floating-point exception summary */
@ -2825,12 +2824,12 @@ void do_load_74xx_tlb (int is_code)
way, is_code, CMP, RPN);
}
static target_ulong booke_tlb_to_page_size (int size)
static always_inline target_ulong booke_tlb_to_page_size (int size)
{
return 1024 << (2 * size);
}
static int booke_page_size_to_tlb (target_ulong page_size)
static always_inline int booke_page_size_to_tlb (target_ulong page_size)
{
int size;

3
target-ppc/translate.c
View File

@ -295,7 +295,6 @@ static void gen_##name (DisasContext *ctx); \
GEN_OPCODE2(name, onam, opc1, opc2, opc3, inval, type); \
static void gen_##name (DisasContext *ctx)
typedef struct opcode_t {
unsigned char opc1, opc2, opc3;
#if HOST_LONG_BITS == 64 /* Explicitely align to 64 bits */
@ -3503,7 +3502,7 @@ GEN_HANDLER(mfmsr, 0x1F, 0x13, 0x02, 0x001FF801, PPC_MISC)
#endif
}
#if 0
#if 1
#define SPR_NOACCESS ((void *)(-1))
#else
static void spr_noaccess (void *opaque, int sprn)