tcg/sparc64: Implement negsetcond_*

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2023-08-05 13:57:32 -07:00
parent 128c7d5194
commit a0fdd7c91c
2 changed files with 32 additions and 12 deletions

View File

@ -720,7 +720,7 @@ static void tcg_out_movcond_i64(TCGContext *s, TCGCond cond, TCGReg ret,
} }
static void tcg_out_setcond_i32(TCGContext *s, TCGCond cond, TCGReg ret, static void tcg_out_setcond_i32(TCGContext *s, TCGCond cond, TCGReg ret,
TCGReg c1, int32_t c2, int c2const) TCGReg c1, int32_t c2, int c2const, bool neg)
{ {
/* For 32-bit comparisons, we can play games with ADDC/SUBC. */ /* For 32-bit comparisons, we can play games with ADDC/SUBC. */
switch (cond) { switch (cond) {
@ -760,22 +760,34 @@ static void tcg_out_setcond_i32(TCGContext *s, TCGCond cond, TCGReg ret,
default: default:
tcg_out_cmp(s, c1, c2, c2const); tcg_out_cmp(s, c1, c2, c2const);
tcg_out_movi_s13(s, ret, 0); tcg_out_movi_s13(s, ret, 0);
tcg_out_movcc(s, cond, MOVCC_ICC, ret, 1, 1); tcg_out_movcc(s, cond, MOVCC_ICC, ret, neg ? -1 : 1, 1);
return; return;
} }
tcg_out_cmp(s, c1, c2, c2const); tcg_out_cmp(s, c1, c2, c2const);
if (cond == TCG_COND_LTU) { if (cond == TCG_COND_LTU) {
tcg_out_arithi(s, ret, TCG_REG_G0, 0, ARITH_ADDC); if (neg) {
/* 0 - 0 - C = -C = (C ? -1 : 0) */
tcg_out_arithi(s, ret, TCG_REG_G0, 0, ARITH_SUBC);
} else { } else {
/* 0 + 0 + C = C = (C ? 1 : 0) */
tcg_out_arithi(s, ret, TCG_REG_G0, 0, ARITH_ADDC);
}
} else {
if (neg) {
/* 0 + -1 + C = C - 1 = (C ? 0 : -1) */
tcg_out_arithi(s, ret, TCG_REG_G0, -1, ARITH_ADDC);
} else {
/* 0 - -1 - C = 1 - C = (C ? 0 : 1) */
tcg_out_arithi(s, ret, TCG_REG_G0, -1, ARITH_SUBC); tcg_out_arithi(s, ret, TCG_REG_G0, -1, ARITH_SUBC);
} }
} }
}
static void tcg_out_setcond_i64(TCGContext *s, TCGCond cond, TCGReg ret, static void tcg_out_setcond_i64(TCGContext *s, TCGCond cond, TCGReg ret,
TCGReg c1, int32_t c2, int c2const) TCGReg c1, int32_t c2, int c2const, bool neg)
{ {
if (use_vis3_instructions) { if (use_vis3_instructions && !neg) {
switch (cond) { switch (cond) {
case TCG_COND_NE: case TCG_COND_NE:
if (c2 != 0) { if (c2 != 0) {
@ -796,11 +808,11 @@ static void tcg_out_setcond_i64(TCGContext *s, TCGCond cond, TCGReg ret,
if the input does not overlap the output. */ if the input does not overlap the output. */
if (c2 == 0 && !is_unsigned_cond(cond) && c1 != ret) { if (c2 == 0 && !is_unsigned_cond(cond) && c1 != ret) {
tcg_out_movi_s13(s, ret, 0); tcg_out_movi_s13(s, ret, 0);
tcg_out_movr(s, cond, ret, c1, 1, 1); tcg_out_movr(s, cond, ret, c1, neg ? -1 : 1, 1);
} else { } else {
tcg_out_cmp(s, c1, c2, c2const); tcg_out_cmp(s, c1, c2, c2const);
tcg_out_movi_s13(s, ret, 0); tcg_out_movi_s13(s, ret, 0);
tcg_out_movcc(s, cond, MOVCC_XCC, ret, 1, 1); tcg_out_movcc(s, cond, MOVCC_XCC, ret, neg ? -1 : 1, 1);
} }
} }
@ -1355,7 +1367,10 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
tcg_out_brcond_i32(s, a2, a0, a1, const_args[1], arg_label(args[3])); tcg_out_brcond_i32(s, a2, a0, a1, const_args[1], arg_label(args[3]));
break; break;
case INDEX_op_setcond_i32: case INDEX_op_setcond_i32:
tcg_out_setcond_i32(s, args[3], a0, a1, a2, c2); tcg_out_setcond_i32(s, args[3], a0, a1, a2, c2, false);
break;
case INDEX_op_negsetcond_i32:
tcg_out_setcond_i32(s, args[3], a0, a1, a2, c2, true);
break; break;
case INDEX_op_movcond_i32: case INDEX_op_movcond_i32:
tcg_out_movcond_i32(s, args[5], a0, a1, a2, c2, args[3], const_args[3]); tcg_out_movcond_i32(s, args[5], a0, a1, a2, c2, args[3], const_args[3]);
@ -1437,7 +1452,10 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
tcg_out_brcond_i64(s, a2, a0, a1, const_args[1], arg_label(args[3])); tcg_out_brcond_i64(s, a2, a0, a1, const_args[1], arg_label(args[3]));
break; break;
case INDEX_op_setcond_i64: case INDEX_op_setcond_i64:
tcg_out_setcond_i64(s, args[3], a0, a1, a2, c2); tcg_out_setcond_i64(s, args[3], a0, a1, a2, c2, false);
break;
case INDEX_op_negsetcond_i64:
tcg_out_setcond_i64(s, args[3], a0, a1, a2, c2, true);
break; break;
case INDEX_op_movcond_i64: case INDEX_op_movcond_i64:
tcg_out_movcond_i64(s, args[5], a0, a1, a2, c2, args[3], const_args[3]); tcg_out_movcond_i64(s, args[5], a0, a1, a2, c2, args[3], const_args[3]);
@ -1564,6 +1582,8 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op)
case INDEX_op_sar_i64: case INDEX_op_sar_i64:
case INDEX_op_setcond_i32: case INDEX_op_setcond_i32:
case INDEX_op_setcond_i64: case INDEX_op_setcond_i64:
case INDEX_op_negsetcond_i32:
case INDEX_op_negsetcond_i64:
return C_O1_I2(r, rZ, rJ); return C_O1_I2(r, rZ, rJ);
case INDEX_op_brcond_i32: case INDEX_op_brcond_i32:

View File

@ -106,7 +106,7 @@ extern bool use_vis3_instructions;
#define TCG_TARGET_HAS_sextract_i32 0 #define TCG_TARGET_HAS_sextract_i32 0
#define TCG_TARGET_HAS_extract2_i32 0 #define TCG_TARGET_HAS_extract2_i32 0
#define TCG_TARGET_HAS_movcond_i32 1 #define TCG_TARGET_HAS_movcond_i32 1
#define TCG_TARGET_HAS_negsetcond_i32 0 #define TCG_TARGET_HAS_negsetcond_i32 1
#define TCG_TARGET_HAS_add2_i32 1 #define TCG_TARGET_HAS_add2_i32 1
#define TCG_TARGET_HAS_sub2_i32 1 #define TCG_TARGET_HAS_sub2_i32 1
#define TCG_TARGET_HAS_mulu2_i32 1 #define TCG_TARGET_HAS_mulu2_i32 1
@ -143,7 +143,7 @@ extern bool use_vis3_instructions;
#define TCG_TARGET_HAS_sextract_i64 0 #define TCG_TARGET_HAS_sextract_i64 0
#define TCG_TARGET_HAS_extract2_i64 0 #define TCG_TARGET_HAS_extract2_i64 0
#define TCG_TARGET_HAS_movcond_i64 1 #define TCG_TARGET_HAS_movcond_i64 1
#define TCG_TARGET_HAS_negsetcond_i64 0 #define TCG_TARGET_HAS_negsetcond_i64 1
#define TCG_TARGET_HAS_add2_i64 1 #define TCG_TARGET_HAS_add2_i64 1
#define TCG_TARGET_HAS_sub2_i64 1 #define TCG_TARGET_HAS_sub2_i64 1
#define TCG_TARGET_HAS_mulu2_i64 0 #define TCG_TARGET_HAS_mulu2_i64 0