added -cpu option for x86 (initial patch by Dan Kenigsberg)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3547 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
parent
5fa0ab8fcb
commit
a049de6161
18
hw/pc.c
18
hw/pc.c
@ -676,7 +676,7 @@ static void pc_init1(int ram_size, int vga_ram_size, const char *boot_device,
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DisplayState *ds, const char **fd_filename, int snapshot,
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DisplayState *ds, const char **fd_filename, int snapshot,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *initrd_filename,
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const char *initrd_filename,
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int pci_enabled)
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int pci_enabled, const char *cpu_model)
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{
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{
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char buf[1024];
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char buf[1024];
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int ret, linux_boot, i;
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int ret, linux_boot, i;
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@ -692,6 +692,18 @@ static void pc_init1(int ram_size, int vga_ram_size, const char *boot_device,
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linux_boot = (kernel_filename != NULL);
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linux_boot = (kernel_filename != NULL);
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/* init CPUs */
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/* init CPUs */
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if (cpu_model == NULL) {
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#ifdef TARGET_X86_64
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cpu_model = "qemu64";
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#else
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cpu_model = "qemu32";
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#endif
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}
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if (x86_find_cpu_by_name(cpu_model)) {
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fprintf(stderr, "Unable to find x86 CPU definition\n");
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exit(1);
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}
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for(i = 0; i < smp_cpus; i++) {
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for(i = 0; i < smp_cpus; i++) {
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env = cpu_init();
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env = cpu_init();
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if (i != 0)
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if (i != 0)
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@ -960,7 +972,7 @@ static void pc_init_pci(int ram_size, int vga_ram_size, const char *boot_device,
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pc_init1(ram_size, vga_ram_size, boot_device,
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pc_init1(ram_size, vga_ram_size, boot_device,
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ds, fd_filename, snapshot,
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ds, fd_filename, snapshot,
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kernel_filename, kernel_cmdline,
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kernel_filename, kernel_cmdline,
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initrd_filename, 1);
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initrd_filename, 1, cpu_model);
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}
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}
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static void pc_init_isa(int ram_size, int vga_ram_size, const char *boot_device,
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static void pc_init_isa(int ram_size, int vga_ram_size, const char *boot_device,
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@ -974,7 +986,7 @@ static void pc_init_isa(int ram_size, int vga_ram_size, const char *boot_device,
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pc_init1(ram_size, vga_ram_size, boot_device,
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pc_init1(ram_size, vga_ram_size, boot_device,
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ds, fd_filename, snapshot,
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ds, fd_filename, snapshot,
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kernel_filename, kernel_cmdline,
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kernel_filename, kernel_cmdline,
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initrd_filename, 0);
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initrd_filename, 0, cpu_model);
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}
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}
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QEMUMachine pc_machine = {
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QEMUMachine pc_machine = {
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@ -274,23 +274,56 @@
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#define CPUID_CMOV (1 << 15)
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#define CPUID_CMOV (1 << 15)
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#define CPUID_PAT (1 << 16)
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#define CPUID_PAT (1 << 16)
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#define CPUID_PSE36 (1 << 17)
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#define CPUID_PSE36 (1 << 17)
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#define CPUID_PN (1 << 18)
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#define CPUID_CLFLUSH (1 << 19)
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#define CPUID_CLFLUSH (1 << 19)
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/* ... */
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#define CPUID_DTS (1 << 21)
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#define CPUID_ACPI (1 << 22)
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#define CPUID_MMX (1 << 23)
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#define CPUID_MMX (1 << 23)
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#define CPUID_FXSR (1 << 24)
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#define CPUID_FXSR (1 << 24)
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#define CPUID_SSE (1 << 25)
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#define CPUID_SSE (1 << 25)
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#define CPUID_SSE2 (1 << 26)
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#define CPUID_SSE2 (1 << 26)
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#define CPUID_SS (1 << 27)
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#define CPUID_HT (1 << 28)
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#define CPUID_TM (1 << 29)
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#define CPUID_IA64 (1 << 30)
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#define CPUID_PBE (1 << 31)
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#define CPUID_EXT_SSE3 (1 << 0)
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#define CPUID_EXT_SSE3 (1 << 0)
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#define CPUID_EXT_MONITOR (1 << 3)
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#define CPUID_EXT_MONITOR (1 << 3)
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#define CPUID_EXT_DSCPL (1 << 4)
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#define CPUID_EXT_VMX (1 << 5)
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#define CPUID_EXT_SMX (1 << 6)
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#define CPUID_EXT_EST (1 << 7)
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#define CPUID_EXT_TM2 (1 << 8)
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#define CPUID_EXT_SSSE3 (1 << 9)
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#define CPUID_EXT_CID (1 << 10)
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#define CPUID_EXT_CX16 (1 << 13)
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#define CPUID_EXT_CX16 (1 << 13)
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#define CPUID_EXT_XTPR (1 << 14)
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#define CPUID_EXT_DCA (1 << 17)
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#define CPUID_EXT_POPCNT (1 << 22)
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#define CPUID_EXT2_SYSCALL (1 << 11)
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#define CPUID_EXT2_SYSCALL (1 << 11)
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#define CPUID_EXT2_MP (1 << 19)
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#define CPUID_EXT2_NX (1 << 20)
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#define CPUID_EXT2_NX (1 << 20)
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#define CPUID_EXT2_MMXEXT (1 << 22)
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#define CPUID_EXT2_FFXSR (1 << 25)
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#define CPUID_EXT2_FFXSR (1 << 25)
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#define CPUID_EXT2_PDPE1GB (1 << 26)
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#define CPUID_EXT2_RDTSCP (1 << 27)
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#define CPUID_EXT2_LM (1 << 29)
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#define CPUID_EXT2_LM (1 << 29)
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#define CPUID_EXT2_3DNOWEXT (1 << 30)
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#define CPUID_EXT2_3DNOW (1 << 31)
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#define CPUID_EXT3_LAHF_LM (1 << 0)
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#define CPUID_EXT3_CMP_LEG (1 << 1)
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#define CPUID_EXT3_SVM (1 << 2)
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#define CPUID_EXT3_SVM (1 << 2)
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#define CPUID_EXT3_EXTAPIC (1 << 3)
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#define CPUID_EXT3_CR8LEG (1 << 4)
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#define CPUID_EXT3_ABM (1 << 5)
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#define CPUID_EXT3_SSE4A (1 << 6)
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#define CPUID_EXT3_MISALIGNSSE (1 << 7)
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#define CPUID_EXT3_3DNOWPREFETCH (1 << 8)
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#define CPUID_EXT3_OSVW (1 << 9)
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#define CPUID_EXT3_IBS (1 << 10)
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#define EXCP00_DIVZ 0
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#define EXCP00_DIVZ 0
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#define EXCP01_SSTP 1
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#define EXCP01_SSTP 1
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@ -566,6 +599,9 @@ typedef struct CPUX86State {
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CPUX86State *cpu_x86_init(void);
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CPUX86State *cpu_x86_init(void);
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int cpu_x86_exec(CPUX86State *s);
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int cpu_x86_exec(CPUX86State *s);
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void cpu_x86_close(CPUX86State *s);
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void cpu_x86_close(CPUX86State *s);
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int x86_find_cpu_by_name (const unsigned char *name);
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void x86_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt,
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...));
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int cpu_get_pic_interrupt(CPUX86State *s);
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int cpu_get_pic_interrupt(CPUX86State *s);
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/* MSDOS compatibility mode FPU exception support */
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/* MSDOS compatibility mode FPU exception support */
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void cpu_set_ferr(CPUX86State *s);
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void cpu_set_ferr(CPUX86State *s);
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@ -689,6 +725,7 @@ static inline int cpu_get_time_fast(void)
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#define cpu_exec cpu_x86_exec
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#define cpu_exec cpu_x86_exec
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#define cpu_gen_code cpu_x86_gen_code
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#define cpu_gen_code cpu_x86_gen_code
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#define cpu_signal_handler cpu_x86_signal_handler
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#define cpu_signal_handler cpu_x86_signal_handler
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#define cpu_list x86_cpu_list
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/* MMU modes definitions */
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/* MMU modes definitions */
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#define MMU_MODE0_SUFFIX _kernel
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#define MMU_MODE0_SUFFIX _kernel
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@ -47,6 +47,67 @@ int modify_ldt(int func, void *ptr, unsigned long bytecount)
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#endif
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#endif
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#endif /* USE_CODE_COPY */
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#endif /* USE_CODE_COPY */
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static struct x86_def_t *x86_cpu_def;
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typedef struct x86_def_t x86_def_t;
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static int cpu_x86_register (CPUX86State *env, const x86_def_t *def);
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static void add_flagname_to_bitmaps(char *flagname, uint32_t *features,
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uint32_t *ext_features,
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uint32_t *ext2_features,
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uint32_t *ext3_features)
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{
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int i;
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/* feature flags taken from "Intel Processor Identification and the CPUID
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* Instruction" and AMD's "CPUID Specification". In cases of disagreement
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* about feature names, the Linux name is used. */
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const char *feature_name[] = {
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"fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
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"cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
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"pat", "pse36", "pn" /* Intel psn */, "clflush" /* Intel clfsh */, NULL, "ds" /* Intel dts */, "acpi", "mmx",
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"fxsr", "sse", "sse2", "ss", "ht" /* Intel htt */, "tm", "ia64", "pbe",
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};
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const char *ext_feature_name[] = {
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"pni" /* Intel,AMD sse3 */, NULL, NULL, "monitor", "ds_cpl", "vmx", NULL /* Linux smx */, "est",
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"tm2", "ssse3", "cid", NULL, NULL, "cx16", "xtpr", NULL,
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NULL, NULL, "dca", NULL, NULL, NULL, NULL, "popcnt",
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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};
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const char *ext2_feature_name[] = {
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"fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
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"cx8" /* AMD CMPXCHG8B */, "apic", NULL, "syscall", "mttr", "pge", "mca", "cmov",
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"pat", "pse36", NULL, NULL /* Linux mp */, "nx" /* Intel xd */, NULL, "mmxext", "mmx",
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"fxsr", "fxsr_opt" /* AMD ffxsr */, "pdpe1gb" /* AMD Page1GB */, "rdtscp", NULL, "lm" /* Intel 64 */, "3dnowext", "3dnow",
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};
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const char *ext3_feature_name[] = {
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"lahf_lm" /* AMD LahfSahf */, "cmp_legacy", "svm", "extapic" /* AMD ExtApicSpace */, "cr8legacy" /* AMD AltMovCr8 */, "abm", "sse4a", "misalignsse",
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"3dnowprefetch", "osvw", NULL /* Linux ibs */, NULL, "skinit", "wdt", NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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};
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for ( i = 0 ; i < 32 ; i++ )
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if (feature_name[i] && !strcmp (flagname, feature_name[i])) {
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*features |= 1 << i;
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return;
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}
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for ( i = 0 ; i < 32 ; i++ )
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if (ext_feature_name[i] && !strcmp (flagname, ext_feature_name[i])) {
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*ext_features |= 1 << i;
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return;
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}
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for ( i = 0 ; i < 32 ; i++ )
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if (ext2_feature_name[i] && !strcmp (flagname, ext2_feature_name[i])) {
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*ext2_features |= 1 << i;
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return;
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}
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for ( i = 0 ; i < 32 ; i++ )
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if (ext3_features[i] && !strcmp (flagname, ext3_feature_name[i])) {
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*ext3_features |= 1 << i;
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return;
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}
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fprintf(stderr, "CPU feature %s not found\n", flagname);
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}
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CPUX86State *cpu_x86_init(void)
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CPUX86State *cpu_x86_init(void)
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{
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{
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CPUX86State *env;
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CPUX86State *env;
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@ -81,66 +142,7 @@ CPUX86State *cpu_x86_init(void)
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asm volatile ("movl %0, %%fs" : : "r" ((1 << 3) | 7));
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asm volatile ("movl %0, %%fs" : : "r" ((1 << 3) | 7));
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}
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}
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#endif
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#endif
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{
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cpu_x86_register(env, x86_cpu_def);
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int family, model, stepping;
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#ifdef TARGET_X86_64
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env->cpuid_vendor1 = 0x68747541; /* "Auth" */
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env->cpuid_vendor2 = 0x69746e65; /* "enti" */
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env->cpuid_vendor3 = 0x444d4163; /* "cAMD" */
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family = 6;
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model = 2;
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stepping = 3;
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#else
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env->cpuid_vendor1 = 0x756e6547; /* "Genu" */
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env->cpuid_vendor2 = 0x49656e69; /* "ineI" */
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env->cpuid_vendor3 = 0x6c65746e; /* "ntel" */
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#if 0
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/* pentium 75-200 */
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family = 5;
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model = 2;
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stepping = 11;
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#else
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/* pentium pro */
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family = 6;
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model = 3;
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stepping = 3;
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#endif
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#endif
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env->cpuid_level = 2;
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env->cpuid_version = (family << 8) | (model << 4) | stepping;
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env->cpuid_features = (CPUID_FP87 | CPUID_DE | CPUID_PSE |
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CPUID_TSC | CPUID_MSR | CPUID_MCE |
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CPUID_CX8 | CPUID_PGE | CPUID_CMOV |
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CPUID_PAT);
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env->pat = 0x0007040600070406ULL;
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env->cpuid_ext3_features = CPUID_EXT3_SVM;
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env->cpuid_ext_features = CPUID_EXT_SSE3;
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env->cpuid_features |= CPUID_FXSR | CPUID_MMX | CPUID_SSE | CPUID_SSE2 | CPUID_PAE | CPUID_SEP;
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env->cpuid_features |= CPUID_APIC;
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env->cpuid_xlevel = 0x8000000e;
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{
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const char *model_id = "QEMU Virtual CPU version " QEMU_VERSION;
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int c, len, i;
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len = strlen(model_id);
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for(i = 0; i < 48; i++) {
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if (i >= len)
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c = '\0';
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else
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c = model_id[i];
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env->cpuid_model[i >> 2] |= c << (8 * (i & 3));
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}
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}
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#ifdef TARGET_X86_64
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/* currently not enabled for std i386 because not fully tested */
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env->cpuid_ext2_features = (env->cpuid_features & 0x0183F3FF);
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env->cpuid_ext2_features |= CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX;
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/* these features are needed for Win64 and aren't fully implemented */
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env->cpuid_features |= CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA;
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/* this feature is needed for Solaris and isn't fully implemented */
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env->cpuid_features |= CPUID_PSE36;
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#endif
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}
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cpu_reset(env);
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cpu_reset(env);
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#ifdef USE_KQEMU
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#ifdef USE_KQEMU
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kqemu_init(env);
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kqemu_init(env);
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@ -148,6 +150,213 @@ CPUX86State *cpu_x86_init(void)
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return env;
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return env;
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}
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}
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struct x86_def_t {
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const char *name;
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uint32_t vendor1, vendor2, vendor3;
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int family;
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int model;
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int stepping;
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uint32_t features, ext_features, ext2_features, ext3_features;
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uint32_t xlevel;
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};
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#define PPRO_FEATURES (CPUID_FP87 | CPUID_DE | CPUID_PSE | CPUID_TSC | \
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CPUID_MSR | CPUID_MCE | CPUID_CX8 | CPUID_PGE | CPUID_CMOV | \
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CPUID_PAT | CPUID_FXSR | CPUID_MMX | CPUID_SSE | CPUID_SSE2 | \
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CPUID_PAE | CPUID_SEP | CPUID_APIC)
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static x86_def_t x86_defs[] = {
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#ifdef TARGET_X86_64
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{
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.name = "qemu64",
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.vendor1 = 0x68747541, /* "Auth" */
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.vendor2 = 0x69746e65, /* "enti" */
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.vendor3 = 0x444d4163, /* "cAMD" */
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.family = 6,
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.model = 2,
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.stepping = 3,
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.features = PPRO_FEATURES |
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/* these features are needed for Win64 and aren't fully implemented */
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||||||
|
CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
|
||||||
|
/* this feature is needed for Solaris and isn't fully implemented */
|
||||||
|
CPUID_PSE36,
|
||||||
|
.ext_features = CPUID_EXT_SSE3,
|
||||||
|
.ext2_features = (PPRO_FEATURES & 0x0183F3FF) |
|
||||||
|
CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
|
||||||
|
.ext3_features = CPUID_EXT3_SVM,
|
||||||
|
.xlevel = 0x80000008,
|
||||||
|
},
|
||||||
|
#endif
|
||||||
|
{
|
||||||
|
.name = "qemu32",
|
||||||
|
.family = 6,
|
||||||
|
.model = 3,
|
||||||
|
.stepping = 3,
|
||||||
|
.features = PPRO_FEATURES,
|
||||||
|
.ext_features = CPUID_EXT_SSE3,
|
||||||
|
.xlevel = 0,
|
||||||
|
},
|
||||||
|
{
|
||||||
|
.name = "486",
|
||||||
|
.family = 4,
|
||||||
|
.model = 0,
|
||||||
|
.stepping = 0,
|
||||||
|
.features = 0x0000000B,
|
||||||
|
.xlevel = 0,
|
||||||
|
},
|
||||||
|
{
|
||||||
|
.name = "pentium",
|
||||||
|
.family = 5,
|
||||||
|
.model = 4,
|
||||||
|
.stepping = 3,
|
||||||
|
.features = 0x008001BF,
|
||||||
|
.xlevel = 0,
|
||||||
|
},
|
||||||
|
{
|
||||||
|
.name = "pentium2",
|
||||||
|
.family = 6,
|
||||||
|
.model = 5,
|
||||||
|
.stepping = 2,
|
||||||
|
.features = 0x0183F9FF,
|
||||||
|
.xlevel = 0,
|
||||||
|
},
|
||||||
|
{
|
||||||
|
.name = "pentium3",
|
||||||
|
.family = 6,
|
||||||
|
.model = 7,
|
||||||
|
.stepping = 3,
|
||||||
|
.features = 0x0383F9FF,
|
||||||
|
.xlevel = 0,
|
||||||
|
},
|
||||||
|
};
|
||||||
|
|
||||||
|
int x86_find_cpu_by_name(const unsigned char *cpu_model)
|
||||||
|
{
|
||||||
|
int ret;
|
||||||
|
unsigned int i;
|
||||||
|
|
||||||
|
char *s = strdup(cpu_model);
|
||||||
|
char *featurestr, *name = strtok(s, ",");
|
||||||
|
uint32_t plus_features = 0, plus_ext_features = 0, plus_ext2_features = 0, plus_ext3_features = 0;
|
||||||
|
uint32_t minus_features = 0, minus_ext_features = 0, minus_ext2_features = 0, minus_ext3_features = 0;
|
||||||
|
int family = -1, model = -1, stepping = -1;
|
||||||
|
|
||||||
|
ret = -1;
|
||||||
|
x86_cpu_def = NULL;
|
||||||
|
for (i = 0; i < sizeof(x86_defs) / sizeof(x86_def_t); i++) {
|
||||||
|
if (strcmp(name, x86_defs[i].name) == 0) {
|
||||||
|
x86_cpu_def = &x86_defs[i];
|
||||||
|
ret = 0;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
if (!x86_cpu_def)
|
||||||
|
goto error;
|
||||||
|
|
||||||
|
featurestr = strtok(NULL, ",");
|
||||||
|
|
||||||
|
while (featurestr) {
|
||||||
|
char *val;
|
||||||
|
if (featurestr[0] == '+') {
|
||||||
|
add_flagname_to_bitmaps(featurestr + 1, &plus_features, &plus_ext_features, &plus_ext2_features, &plus_ext3_features);
|
||||||
|
} else if (featurestr[0] == '-') {
|
||||||
|
add_flagname_to_bitmaps(featurestr + 1, &minus_features, &minus_ext_features, &minus_ext2_features, &minus_ext3_features);
|
||||||
|
} else if ((val = strchr(featurestr, '='))) {
|
||||||
|
*val = 0; val++;
|
||||||
|
if (!strcmp(featurestr, "family")) {
|
||||||
|
char *err;
|
||||||
|
family = strtol(val, &err, 10);
|
||||||
|
if (!*val || *err || family < 0) {
|
||||||
|
fprintf(stderr, "bad numerical value %s\n", val);
|
||||||
|
x86_cpu_def = 0;
|
||||||
|
goto error;
|
||||||
|
}
|
||||||
|
x86_cpu_def->family = family;
|
||||||
|
} else if (!strcmp(featurestr, "model")) {
|
||||||
|
char *err;
|
||||||
|
model = strtol(val, &err, 10);
|
||||||
|
if (!*val || *err || model < 0 || model > 0xf) {
|
||||||
|
fprintf(stderr, "bad numerical value %s\n", val);
|
||||||
|
x86_cpu_def = 0;
|
||||||
|
goto error;
|
||||||
|
}
|
||||||
|
x86_cpu_def->model = model;
|
||||||
|
} else if (!strcmp(featurestr, "stepping")) {
|
||||||
|
char *err;
|
||||||
|
stepping = strtol(val, &err, 10);
|
||||||
|
if (!*val || *err || stepping < 0 || stepping > 0xf) {
|
||||||
|
fprintf(stderr, "bad numerical value %s\n", val);
|
||||||
|
x86_cpu_def = 0;
|
||||||
|
goto error;
|
||||||
|
}
|
||||||
|
x86_cpu_def->stepping = stepping;
|
||||||
|
} else {
|
||||||
|
fprintf(stderr, "unregnized feature %s\n", featurestr);
|
||||||
|
x86_cpu_def = 0;
|
||||||
|
goto error;
|
||||||
|
}
|
||||||
|
} else {
|
||||||
|
fprintf(stderr, "feature string `%s' not in format (+feature|-feature|feature=xyz)\n", featurestr);
|
||||||
|
x86_cpu_def = 0;
|
||||||
|
goto error;
|
||||||
|
}
|
||||||
|
featurestr = strtok(NULL, ",");
|
||||||
|
}
|
||||||
|
x86_cpu_def->features |= plus_features;
|
||||||
|
x86_cpu_def->ext_features |= plus_ext_features;
|
||||||
|
x86_cpu_def->ext2_features |= plus_ext2_features;
|
||||||
|
x86_cpu_def->ext3_features |= plus_ext3_features;
|
||||||
|
x86_cpu_def->features &= ~minus_features;
|
||||||
|
x86_cpu_def->ext_features &= ~minus_ext_features;
|
||||||
|
x86_cpu_def->ext2_features &= ~minus_ext2_features;
|
||||||
|
x86_cpu_def->ext3_features &= ~minus_ext3_features;
|
||||||
|
|
||||||
|
error:
|
||||||
|
free(s);
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
void x86_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...))
|
||||||
|
{
|
||||||
|
unsigned int i;
|
||||||
|
|
||||||
|
for (i = 0; i < sizeof(x86_defs) / sizeof(x86_def_t); i++)
|
||||||
|
(*cpu_fprintf)(f, "x86 %16s\n", x86_defs[i].name);
|
||||||
|
}
|
||||||
|
|
||||||
|
int cpu_x86_register (CPUX86State *env, const x86_def_t *def)
|
||||||
|
{
|
||||||
|
if (def->vendor1) {
|
||||||
|
env->cpuid_vendor1 = def->vendor1;
|
||||||
|
env->cpuid_vendor2 = def->vendor2;
|
||||||
|
env->cpuid_vendor3 = def->vendor3;
|
||||||
|
} else {
|
||||||
|
env->cpuid_vendor1 = 0x756e6547; /* "Genu" */
|
||||||
|
env->cpuid_vendor2 = 0x49656e69; /* "ineI" */
|
||||||
|
env->cpuid_vendor3 = 0x6c65746e; /* "ntel" */
|
||||||
|
}
|
||||||
|
env->cpuid_level = 2;
|
||||||
|
env->cpuid_version = (def->family << 8) | (def->model << 4) | def->stepping;
|
||||||
|
env->cpuid_features = def->features;
|
||||||
|
env->pat = 0x0007040600070406ULL;
|
||||||
|
env->cpuid_ext_features = def->ext_features;
|
||||||
|
env->cpuid_ext2_features = def->ext2_features;
|
||||||
|
env->cpuid_xlevel = def->xlevel;
|
||||||
|
env->cpuid_ext3_features = def->ext3_features;
|
||||||
|
{
|
||||||
|
const char *model_id = "QEMU Virtual CPU version " QEMU_VERSION;
|
||||||
|
int c, len, i;
|
||||||
|
len = strlen(model_id);
|
||||||
|
for(i = 0; i < 48; i++) {
|
||||||
|
if (i >= len)
|
||||||
|
c = '\0';
|
||||||
|
else
|
||||||
|
c = model_id[i];
|
||||||
|
env->cpuid_model[i >> 2] |= c << (8 * (i & 3));
|
||||||
|
}
|
||||||
|
}
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
/* NOTE: must be called outside the CPU execute loop */
|
/* NOTE: must be called outside the CPU execute loop */
|
||||||
void cpu_reset(CPUX86State *env)
|
void cpu_reset(CPUX86State *env)
|
||||||
{
|
{
|
||||||
@ -185,7 +394,7 @@ void cpu_reset(CPUX86State *env)
|
|||||||
cpu_x86_load_seg_cache(env, R_GS, 0, 0, 0xffff, 0);
|
cpu_x86_load_seg_cache(env, R_GS, 0, 0, 0xffff, 0);
|
||||||
|
|
||||||
env->eip = 0xfff0;
|
env->eip = 0xfff0;
|
||||||
env->regs[R_EDX] = 0x600; /* indicate P6 processor */
|
env->regs[R_EDX] = env->cpuid_version;
|
||||||
|
|
||||||
env->eflags = 0x2;
|
env->eflags = 0x2;
|
||||||
|
|
||||||
|
Loading…
Reference in New Issue
Block a user