Fix disabling interrupts in sun4u
clear interrupt request if the interrupt priority < CPU pil clear hardware interrupt request if interrupts are disabled Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com> [blauwirbel@gmail.com: added a comment about magic 2] Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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@ -261,7 +261,9 @@ void cpu_check_irqs(CPUState *env)
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pil |= 1 << 14;
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}
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if (!pil) {
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/* The bit corresponding to psrpil is (1<< psrpil), the next bit
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is (2 << psrpil). */
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if (pil < (2 << env->psrpil)){
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if (env->interrupt_request & CPU_INTERRUPT_HARD) {
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CPUIRQ_DPRINTF("Reset CPU IRQ (current interrupt %x)\n",
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env->interrupt_index);
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@ -293,10 +295,12 @@ void cpu_check_irqs(CPUState *env)
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break;
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}
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}
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} else {
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} else if (env->interrupt_request & CPU_INTERRUPT_HARD) {
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CPUIRQ_DPRINTF("Interrupts disabled, pil=%08x pil_in=%08x softint=%08x "
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"current interrupt %x\n",
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pil, env->pil_in, env->softint, env->interrupt_index);
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env->interrupt_index = 0;
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cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
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}
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}
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