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target/ppc: cpu_init: Reuse init_proc_603 for the e300

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init_proc_603 is defined after init_proc_e300, so I had to move some
code around to make it work.

Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Message-Id: <20220216162426.1885923-19-farosas@linux.ibm.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
This commit is contained in:
Fabiano Rosas 2022-02-18 08:34:15 +01:00 committed by Cédric Le Goater
parent 3b18ec7687
commit 9f33f3d876
1 changed files with 46 additions and 58 deletions
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104
target/ppc/cpu_init.c
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@ -3265,64 +3265,6 @@ POWERPC_FAMILY(e200)(ObjectClass *oc, void *data)
POWERPC_FLAG_BUS_CLK;
}
static void init_proc_e300(CPUPPCState *env)
{
register_ne_601_sprs(env);
register_sdr1_sprs(env);
register_603_sprs(env);
register_e300_sprs(env);
/* Memory management */
register_low_BATs(env);
register_high_BATs(env);
register_6xx_7xx_soft_tlb(env, 64, 2);
init_excp_603(env);
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
ppc6xx_irq_init(env_archcpu(env));
}
POWERPC_FAMILY(e300)(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc);
dc->desc = "e300 core";
pcc->init_proc = init_proc_e300;
pcc->check_pow = check_pow_hid0;
pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | PPC_MFTB |
PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES |
PPC_FLOAT_STFIWX |
PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ |
PPC_MEM_SYNC | PPC_MEM_EIEIO |
PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | PPC_6xx_TLB |
PPC_SEGMENT | PPC_EXTERN;
pcc->msr_mask = (1ull << MSR_POW) |
(1ull << MSR_TGPR) |
(1ull << MSR_ILE) |
(1ull << MSR_EE) |
(1ull << MSR_PR) |
(1ull << MSR_FP) |
(1ull << MSR_ME) |
(1ull << MSR_FE0) |
(1ull << MSR_SE) |
(1ull << MSR_DE) |
(1ull << MSR_FE1) |
(1ull << MSR_AL) |
(1ull << MSR_EP) |
(1ull << MSR_IR) |
(1ull << MSR_DR) |
(1ull << MSR_RI) |
(1ull << MSR_LE);
pcc->mmu_model = POWERPC_MMU_SOFT_6xx;
pcc->excp_model = POWERPC_EXCP_6xx;
pcc->bus_model = PPC_FLAGS_INPUT_6xx;
pcc->bfd_mach = bfd_mach_ppc_603;
pcc->flags = POWERPC_FLAG_TGPR | POWERPC_FLAG_SE |
POWERPC_FLAG_BE | POWERPC_FLAG_BUS_CLK;
}
enum fsl_e500_version {
fsl_e500v1,
fsl_e500v2,
@ -3878,6 +3820,52 @@ POWERPC_FAMILY(603E)(ObjectClass *oc, void *data)
POWERPC_FLAG_BE | POWERPC_FLAG_BUS_CLK;
}
static void init_proc_e300(CPUPPCState *env)
{
init_proc_603(env);
register_e300_sprs(env);
}
POWERPC_FAMILY(e300)(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc);
dc->desc = "e300 core";
pcc->init_proc = init_proc_e300;
pcc->check_pow = check_pow_hid0;
pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | PPC_MFTB |
PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES |
PPC_FLOAT_STFIWX |
PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ |
PPC_MEM_SYNC | PPC_MEM_EIEIO |
PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | PPC_6xx_TLB |
PPC_SEGMENT | PPC_EXTERN;
pcc->msr_mask = (1ull << MSR_POW) |
(1ull << MSR_TGPR) |
(1ull << MSR_ILE) |
(1ull << MSR_EE) |
(1ull << MSR_PR) |
(1ull << MSR_FP) |
(1ull << MSR_ME) |
(1ull << MSR_FE0) |
(1ull << MSR_SE) |
(1ull << MSR_DE) |
(1ull << MSR_FE1) |
(1ull << MSR_AL) |
(1ull << MSR_EP) |
(1ull << MSR_IR) |
(1ull << MSR_DR) |
(1ull << MSR_RI) |
(1ull << MSR_LE);
pcc->mmu_model = POWERPC_MMU_SOFT_6xx;
pcc->excp_model = POWERPC_EXCP_6xx;
pcc->bus_model = PPC_FLAGS_INPUT_6xx;
pcc->bfd_mach = bfd_mach_ppc_603;
pcc->flags = POWERPC_FLAG_TGPR | POWERPC_FLAG_SE |
POWERPC_FLAG_BE | POWERPC_FLAG_BUS_CLK;
}
static void init_proc_604(CPUPPCState *env)
{
register_ne_601_sprs(env);