Hexagon HVX (target/hexagon) C preprocessor for decode tree
Acked-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
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@ -40,6 +40,11 @@ const char * const opcode_names[] = {
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* Q6INSN(A2_add,"Rd32=add(Rs32,Rt32)",ATTRIBS(),
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* "Add 32-bit registers",
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* { RdV=RsV+RtV;})
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* HVX instructions have the following form
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* EXTINSN(V6_vinsertwr, "Vx32.w=vinsert(Rt32)",
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* ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VX,A_CVI_LATE),
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* "Insert Word Scalar into Vector",
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* VxV.uw[0] = RtV;)
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*/
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const char * const opcode_syntax[XX_LAST_OPCODE] = {
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#define Q6INSN(TAG, BEH, ATTRIBS, DESCR, SEM) \
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@ -105,6 +110,14 @@ static const char *get_opcode_enc(int opcode)
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static const char *get_opcode_enc_class(int opcode)
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{
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const char *tmp = opcode_encodings[opcode].encoding;
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if (tmp == NULL) {
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const char *test = "V6_"; /* HVX */
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const char *name = opcode_names[opcode];
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if (strncmp(name, test, strlen(test)) == 0) {
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return "EXT_mmvec";
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}
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}
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return opcode_enc_class_names[opcode_encodings[opcode].enc_class];
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}
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