icount: remove unnecessary gen_io_end calls
Prior patch resets can_do_io flag at the TB entry. Therefore there is no need in resetting this flag at the end of the block. This patch removes redundant gen_io_end calls. Signed-off-by: Pavel Dovgalyuk <Pavel.Dovgaluk@ispras.ru> Message-Id: <156404429499.18669.13404064982854123855.stgit@pasha-Precision-3630-Tower> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Pavel Dovgalyuk <pavel.dovgaluk@gmail.com>
This commit is contained in:
parent
ba3e792669
commit
9e9b10c649
@ -90,7 +90,6 @@ void translator_loop(const TranslatorOps *ops, DisasContextBase *db,
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/* Accept I/O on the last instruction. */
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gen_io_start();
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ops->translate_insn(db, cpu);
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gen_io_end();
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} else {
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ops->translate_insn(db, cpu);
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}
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@ -16,6 +16,13 @@ static inline void gen_io_start(void)
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tcg_temp_free_i32(tmp);
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}
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/*
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* cpu->can_do_io is cleared automatically at the beginning of
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* each translation block. The cost is minimal and only paid
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* for -icount, plus it would be very easy to forget doing it
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* in the translator. Therefore, backends only need to call
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* gen_io_start.
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*/
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static inline void gen_io_end(void)
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{
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TCGv_i32 tmp = tcg_const_i32(0);
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@ -58,7 +65,6 @@ static inline void gen_tb_start(TranslationBlock *tb)
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tcg_gen_st16_i32(count, cpu_env,
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offsetof(ArchCPU, neg.icount_decr.u16.low) -
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offsetof(ArchCPU, env));
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/* Disable I/O by default */
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gen_io_end();
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}
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@ -1332,7 +1332,6 @@ static DisasJumpType gen_mfpr(DisasContext *ctx, TCGv va, int regno)
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if (use_icount) {
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gen_io_start();
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helper(va);
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gen_io_end();
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return DISAS_PC_STALE;
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} else {
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helper(va);
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@ -2398,7 +2397,6 @@ static DisasJumpType translate_one(DisasContext *ctx, uint32_t insn)
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if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
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gen_io_start();
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gen_helper_load_pcc(va, cpu_env);
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gen_io_end();
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ret = DISAS_PC_STALE;
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} else {
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gen_helper_load_pcc(va, cpu_env);
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@ -1775,7 +1775,6 @@ static void handle_sys(DisasContext *s, uint32_t insn, bool isread,
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if ((tb_cflags(s->base.tb) & CF_USE_ICOUNT) && (ri->type & ARM_CP_IO)) {
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/* I/O operations must end the TB here (whether read or write) */
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gen_io_end();
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s->base.is_jmp = DISAS_UPDATE;
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} else if (!isread && !(ri->type & ARM_CP_SUPPRESS_TB_END)) {
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/* We default to ending the TB on a coprocessor register write,
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@ -2084,9 +2083,6 @@ static void disas_uncond_b_reg(DisasContext *s, uint32_t insn)
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gen_helper_exception_return(cpu_env, dst);
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tcg_temp_free_i64(dst);
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if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
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gen_io_end();
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}
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/* Must exit loop to check un-masked IRQs */
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s->base.is_jmp = DISAS_EXIT;
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return;
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@ -3213,9 +3213,6 @@ static void gen_rfe(DisasContext *s, TCGv_i32 pc, TCGv_i32 cpsr)
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gen_io_start();
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}
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gen_helper_cpsr_write_eret(cpu_env, cpsr);
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if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
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gen_io_end();
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}
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tcg_temp_free_i32(cpsr);
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/* Must exit loop to check un-masked IRQs */
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s->base.is_jmp = DISAS_EXIT;
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@ -7303,7 +7300,6 @@ static int disas_coproc_insn(DisasContext *s, uint32_t insn)
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if ((tb_cflags(s->base.tb) & CF_USE_ICOUNT) && (ri->type & ARM_CP_IO)) {
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/* I/O operations must end the TB here (whether read or write) */
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gen_io_end();
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gen_lookup_tb(s);
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} else if (!isread && !(ri->type & ARM_CP_SUPPRESS_TB_END)) {
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/* We default to ending the TB on a coprocessor register write,
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@ -9163,9 +9159,6 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn)
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gen_io_start();
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}
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gen_helper_cpsr_write_eret(cpu_env, tmp);
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if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
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gen_io_end();
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}
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tcg_temp_free_i32(tmp);
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/* Must exit loop to check un-masked IRQs */
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s->base.is_jmp = DISAS_EXIT;
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@ -3225,8 +3225,6 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
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npc = dc->pc;
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if (tb_cflags(tb) & CF_LAST_IO)
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gen_io_end();
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/* Force an update if the per-tb cpu state has changed. */
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if (dc->is_jmp == DISAS_NEXT
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&& (dc->cpustate_changed || !dc->flagx_known
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@ -2161,7 +2161,6 @@ static bool trans_mfctl(DisasContext *ctx, arg_mfctl *a)
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if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
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gen_io_start();
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gen_helper_read_interval_timer(tmp);
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gen_io_end();
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ctx->base.is_jmp = DISAS_IAQ_N_STALE;
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} else {
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gen_helper_read_interval_timer(tmp);
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@ -5381,7 +5381,6 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
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gen_op_mov_reg_v(s, dflag, rm, s->T0);
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set_cc_op(s, CC_OP_EFLAGS);
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if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
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gen_io_end();
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gen_jmp(s, s->pc - s->cs_base);
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}
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break;
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@ -6443,7 +6442,6 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
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gen_op_mov_reg_v(s, ot, R_EAX, s->T1);
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gen_bpt_io(s, s->tmp2_i32, ot);
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if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
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gen_io_end();
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gen_jmp(s, s->pc - s->cs_base);
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}
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break;
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@ -6464,7 +6462,6 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
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gen_helper_out_func(ot, s->tmp2_i32, s->tmp3_i32);
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gen_bpt_io(s, s->tmp2_i32, ot);
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if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
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gen_io_end();
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gen_jmp(s, s->pc - s->cs_base);
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}
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break;
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@ -6482,7 +6479,6 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
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gen_op_mov_reg_v(s, ot, R_EAX, s->T1);
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gen_bpt_io(s, s->tmp2_i32, ot);
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if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
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gen_io_end();
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gen_jmp(s, s->pc - s->cs_base);
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}
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break;
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@ -6502,7 +6498,6 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
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gen_helper_out_func(ot, s->tmp2_i32, s->tmp3_i32);
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gen_bpt_io(s, s->tmp2_i32, ot);
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if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
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gen_io_end();
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gen_jmp(s, s->pc - s->cs_base);
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}
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break;
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@ -7206,7 +7201,6 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
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}
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gen_helper_rdtsc(cpu_env);
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if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
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gen_io_end();
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gen_jmp(s, s->pc - s->cs_base);
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}
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break;
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@ -7666,7 +7660,6 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
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}
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gen_helper_rdtscp(cpu_env);
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if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
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gen_io_end();
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gen_jmp(s, s->pc - s->cs_base);
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}
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break;
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@ -8036,9 +8029,6 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
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gen_op_mov_v_reg(s, ot, s->T0, rm);
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gen_helper_write_crN(cpu_env, tcg_const_i32(reg),
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s->T0);
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if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
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gen_io_end();
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}
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gen_jmp_im(s, s->pc - s->cs_base);
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gen_eob(s);
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} else {
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@ -885,9 +885,6 @@ static void dec_wcsr(DisasContext *dc)
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}
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gen_helper_wcsr_im(cpu_env, cpu_R[dc->r1]);
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tcg_gen_movi_tl(cpu_pc, dc->pc + 4);
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if (tb_cflags(dc->tb) & CF_USE_ICOUNT) {
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gen_io_end();
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}
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dc->is_jmp = DISAS_UPDATE;
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break;
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case CSR_IP:
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@ -897,9 +894,6 @@ static void dec_wcsr(DisasContext *dc)
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}
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gen_helper_wcsr_ip(cpu_env, cpu_R[dc->r1]);
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tcg_gen_movi_tl(cpu_pc, dc->pc + 4);
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if (tb_cflags(dc->tb) & CF_USE_ICOUNT) {
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gen_io_end();
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}
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dc->is_jmp = DISAS_UPDATE;
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break;
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case CSR_ICC:
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@ -1111,9 +1105,6 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
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&& (dc->pc - page_start < TARGET_PAGE_SIZE)
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&& num_insns < max_insns);
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if (tb_cflags(tb) & CF_LAST_IO) {
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gen_io_end();
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}
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if (unlikely(cs->singlestep_enabled)) {
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if (dc->is_jmp == DISAS_NEXT) {
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@ -1724,8 +1724,6 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
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npc = dc->jmp_pc;
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}
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if (tb_cflags(tb) & CF_LAST_IO)
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gen_io_end();
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/* Force an update if the per-tb cpu state has changed. */
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if (dc->is_jmp == DISAS_NEXT
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&& (dc->cpustate_changed || org_flags != dc->tb_flags)) {
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@ -7129,9 +7129,6 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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gen_io_start();
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}
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gen_helper_mfc0_count(arg, cpu_env);
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if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
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gen_io_end();
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}
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/*
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* Break the TB to be able to take timer interrupts immediately
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* after reading count. DISAS_STOP isn't sufficient, we need to
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@ -8296,7 +8293,6 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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/* For simplicity assume that all writes can cause interrupts. */
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if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
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gen_io_end();
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/*
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* DISAS_STOP isn't sufficient, we need to ensure we break out of
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* translated code to check for pending interrupts.
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@ -8607,9 +8603,6 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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gen_io_start();
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}
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gen_helper_mfc0_count(arg, cpu_env);
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if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
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gen_io_end();
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}
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/*
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* Break the TB to be able to take timer interrupts immediately
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* after reading count. DISAS_STOP isn't sufficient, we need to
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@ -9748,7 +9741,6 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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/* For simplicity assume that all writes can cause interrupts. */
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if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
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gen_io_end();
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/*
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* DISAS_STOP isn't sufficient, we need to ensure we break out of
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* translated code to check for pending interrupts.
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@ -12817,9 +12809,6 @@ static void gen_rdhwr(DisasContext *ctx, int rt, int rd, int sel)
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gen_io_start();
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}
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gen_helper_rdhwr_cc(t0, cpu_env);
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if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
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gen_io_end();
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}
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gen_store_gpr(t0, rt);
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/*
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* Break the TB to be able to take timer interrupts immediately
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@ -862,10 +862,6 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
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!tcg_op_buf_full() &&
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num_insns < max_insns);
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if (tb_cflags(tb) & CF_LAST_IO) {
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gen_io_end();
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}
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/* Indicate where the next block should start */
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switch (dc->is_jmp) {
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case DISAS_NEXT:
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@ -1861,7 +1861,6 @@ static void gen_darn(DisasContext *ctx)
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gen_helper_darn64(cpu_gpr[rD(ctx->opcode)]);
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}
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if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
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gen_io_end();
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gen_stop_exception(ctx);
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}
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}
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@ -3991,9 +3990,6 @@ static void gen_rfi(DisasContext *ctx)
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gen_update_cfar(ctx, ctx->base.pc_next - 4);
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gen_helper_rfi(cpu_env);
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gen_sync_exception(ctx);
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if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
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gen_io_end();
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}
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#endif
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}
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@ -4011,9 +4007,6 @@ static void gen_rfid(DisasContext *ctx)
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gen_update_cfar(ctx, ctx->base.pc_next - 4);
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gen_helper_rfid(cpu_env);
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gen_sync_exception(ctx);
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if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
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gen_io_end();
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}
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#endif
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}
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@ -4389,9 +4382,6 @@ static void gen_mtmsrd(DisasContext *ctx)
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/* Must stop the translation as machine state (may have) changed */
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/* Note that mtmsr is not always defined as context-synchronizing */
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gen_stop_exception(ctx);
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if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
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gen_io_end();
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}
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}
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#endif /* !defined(CONFIG_USER_ONLY) */
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}
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@ -4429,9 +4419,6 @@ static void gen_mtmsr(DisasContext *ctx)
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tcg_gen_mov_tl(msr, cpu_gpr[rS(ctx->opcode)]);
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#endif
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gen_helper_store_msr(cpu_env, msr);
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if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
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gen_io_end();
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}
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tcg_temp_free(msr);
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/* Must stop the translation as machine state (may have) changed */
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/* Note that mtmsr is not always defined as context-synchronizing */
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@ -189,7 +189,6 @@ static void spr_read_decr(DisasContext *ctx, int gprn, int sprn)
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}
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gen_helper_load_decr(cpu_gpr[gprn], cpu_env);
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if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
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gen_io_end();
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gen_stop_exception(ctx);
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}
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}
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@ -201,7 +200,6 @@ static void spr_write_decr(DisasContext *ctx, int sprn, int gprn)
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}
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gen_helper_store_decr(cpu_env, cpu_gpr[gprn]);
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if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
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gen_io_end();
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gen_stop_exception(ctx);
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}
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}
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@ -511,7 +511,6 @@ static bool trans_fence_i(DisasContext *ctx, arg_fence_i *a)
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} while (0)
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#define RISCV_OP_CSR_POST do {\
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gen_io_end(); \
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gen_set_gpr(a->rd, dest); \
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tcg_gen_movi_tl(cpu_pc, ctx->pc_succ_insn); \
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exit_tb(ctx); \
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@ -4412,10 +4412,6 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn)
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gen_helper_tick_set_limit(r_tickptr,
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cpu_tick_cmpr);
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tcg_temp_free_ptr(r_tickptr);
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if (tb_cflags(dc->base.tb) &
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CF_USE_ICOUNT) {
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gen_io_end();
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}
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/* End TB to handle timer interrupt */
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dc->base.is_jmp = DISAS_EXIT;
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}
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@ -4440,10 +4436,6 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn)
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gen_helper_tick_set_count(r_tickptr,
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cpu_tmp0);
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tcg_temp_free_ptr(r_tickptr);
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if (tb_cflags(dc->base.tb) &
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CF_USE_ICOUNT) {
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gen_io_end();
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}
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/* End TB to handle timer interrupt */
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dc->base.is_jmp = DISAS_EXIT;
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}
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@ -4468,10 +4460,6 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn)
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gen_helper_tick_set_limit(r_tickptr,
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cpu_stick_cmpr);
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tcg_temp_free_ptr(r_tickptr);
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if (tb_cflags(dc->base.tb) &
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CF_USE_ICOUNT) {
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||||
gen_io_end();
|
||||
}
|
||||
/* End TB to handle timer interrupt */
|
||||
dc->base.is_jmp = DISAS_EXIT;
|
||||
}
|
||||
@ -4588,10 +4576,6 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn)
|
||||
gen_helper_tick_set_count(r_tickptr,
|
||||
cpu_tmp0);
|
||||
tcg_temp_free_ptr(r_tickptr);
|
||||
if (tb_cflags(dc->base.tb) &
|
||||
CF_USE_ICOUNT) {
|
||||
gen_io_end();
|
||||
}
|
||||
/* End TB to handle timer interrupt */
|
||||
dc->base.is_jmp = DISAS_EXIT;
|
||||
}
|
||||
|
@ -1931,7 +1931,6 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
|
||||
code. */
|
||||
cpu_abort(cs, "IO on conditional branch instruction");
|
||||
}
|
||||
gen_io_end();
|
||||
}
|
||||
|
||||
/* At this stage dc->condjmp will only be set when the skipped
|
||||
|
@ -539,9 +539,6 @@ static void gen_waiti(DisasContext *dc, uint32_t imm4)
|
||||
gen_io_start();
|
||||
}
|
||||
gen_helper_waiti(cpu_env, pc, intlevel);
|
||||
if (tb_cflags(dc->base.tb) & CF_USE_ICOUNT) {
|
||||
gen_io_end();
|
||||
}
|
||||
tcg_temp_free(pc);
|
||||
tcg_temp_free(intlevel);
|
||||
}
|
||||
@ -2215,9 +2212,6 @@ static void translate_rsr_ccount(DisasContext *dc, const OpcodeArg arg[],
|
||||
}
|
||||
gen_helper_update_ccount(cpu_env);
|
||||
tcg_gen_mov_i32(arg[0].out, cpu_SR[par[0]]);
|
||||
if (tb_cflags(dc->base.tb) & CF_USE_ICOUNT) {
|
||||
gen_io_end();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
@ -2607,9 +2601,6 @@ static void translate_wsr_ccompare(DisasContext *dc, const OpcodeArg arg[],
|
||||
tcg_gen_mov_i32(cpu_SR[par[0]], arg[0].in);
|
||||
gen_helper_update_ccompare(cpu_env, tmp);
|
||||
tcg_temp_free(tmp);
|
||||
if (tb_cflags(dc->base.tb) & CF_USE_ICOUNT) {
|
||||
gen_io_end();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
@ -2621,9 +2612,6 @@ static void translate_wsr_ccount(DisasContext *dc, const OpcodeArg arg[],
|
||||
gen_io_start();
|
||||
}
|
||||
gen_helper_wsr_ccount(cpu_env, arg[0].in);
|
||||
if (tb_cflags(dc->base.tb) & CF_USE_ICOUNT) {
|
||||
gen_io_end();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
@ -2830,9 +2818,6 @@ static void translate_xsr_ccount(DisasContext *dc, const OpcodeArg arg[],
|
||||
tcg_gen_mov_i32(arg[0].out, tmp);
|
||||
tcg_temp_free(tmp);
|
||||
|
||||
if (tb_cflags(dc->base.tb) & CF_USE_ICOUNT) {
|
||||
gen_io_end();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user