hw/i386: Make pit a property of common x86 base machine type
Both pc and microvm have pit property individually. Let's just make it the property of common x86 base machine type. Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com> Reviewed-by: Sergio Lopez <slp@redhat.com> Message-Id: <20220310122811.807794-2-xiaoyao.li@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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9dee7e5109
@ -257,7 +257,7 @@ static void microvm_devices_init(MicrovmMachineState *mms)
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g_free(i8259);
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}
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if (mms->pit == ON_OFF_AUTO_ON || mms->pit == ON_OFF_AUTO_AUTO) {
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if (x86ms->pit == ON_OFF_AUTO_ON || x86ms->pit == ON_OFF_AUTO_AUTO) {
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if (kvm_pit_in_kernel()) {
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kvm_pit_init(isa_bus, 0x40);
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} else {
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@ -508,23 +508,6 @@ static void microvm_machine_set_pic(Object *obj, Visitor *v, const char *name,
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visit_type_OnOffAuto(v, name, &mms->pic, errp);
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}
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static void microvm_machine_get_pit(Object *obj, Visitor *v, const char *name,
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void *opaque, Error **errp)
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{
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MicrovmMachineState *mms = MICROVM_MACHINE(obj);
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OnOffAuto pit = mms->pit;
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visit_type_OnOffAuto(v, name, &pit, errp);
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}
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static void microvm_machine_set_pit(Object *obj, Visitor *v, const char *name,
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void *opaque, Error **errp)
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{
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MicrovmMachineState *mms = MICROVM_MACHINE(obj);
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visit_type_OnOffAuto(v, name, &mms->pit, errp);
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}
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static void microvm_machine_get_rtc(Object *obj, Visitor *v, const char *name,
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void *opaque, Error **errp)
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{
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@ -650,7 +633,6 @@ static void microvm_machine_initfn(Object *obj)
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/* Configuration */
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mms->pic = ON_OFF_AUTO_AUTO;
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mms->pit = ON_OFF_AUTO_AUTO;
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mms->rtc = ON_OFF_AUTO_AUTO;
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mms->pcie = ON_OFF_AUTO_AUTO;
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mms->ioapic2 = ON_OFF_AUTO_AUTO;
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@ -709,13 +691,6 @@ static void microvm_class_init(ObjectClass *oc, void *data)
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object_class_property_set_description(oc, MICROVM_MACHINE_PIC,
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"Enable i8259 PIC");
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object_class_property_add(oc, MICROVM_MACHINE_PIT, "OnOffAuto",
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microvm_machine_get_pit,
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microvm_machine_set_pit,
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NULL, NULL);
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object_class_property_set_description(oc, MICROVM_MACHINE_PIT,
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"Enable i8254 PIT");
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object_class_property_add(oc, MICROVM_MACHINE_RTC, "OnOffAuto",
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microvm_machine_get_rtc,
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microvm_machine_set_rtc,
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24
hw/i386/pc.c
24
hw/i386/pc.c
@ -1123,6 +1123,7 @@ void pc_basic_device_init(struct PCMachineState *pcms,
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ISADevice *pit = NULL;
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MemoryRegion *ioport80_io = g_new(MemoryRegion, 1);
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MemoryRegion *ioportF0_io = g_new(MemoryRegion, 1);
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X86MachineState *x86ms = X86_MACHINE(pcms);
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memory_region_init_io(ioport80_io, NULL, &ioport80_io_ops, NULL, "ioport80", 1);
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memory_region_add_subregion(isa_bus->address_space_io, 0x80, ioport80_io);
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@ -1167,7 +1168,8 @@ void pc_basic_device_init(struct PCMachineState *pcms,
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qemu_register_boot_set(pc_boot_set, *rtc_state);
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if (!xen_enabled() && pcms->pit_enabled) {
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if (!xen_enabled() &&
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(x86ms->pit == ON_OFF_AUTO_AUTO || x86ms->pit == ON_OFF_AUTO_ON)) {
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if (kvm_pit_in_kernel()) {
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pit = kvm_pit_init(isa_bus, 0x40);
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} else {
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@ -1537,20 +1539,6 @@ static void pc_machine_set_sata(Object *obj, bool value, Error **errp)
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pcms->sata_enabled = value;
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}
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static bool pc_machine_get_pit(Object *obj, Error **errp)
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{
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PCMachineState *pcms = PC_MACHINE(obj);
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return pcms->pit_enabled;
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}
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static void pc_machine_set_pit(Object *obj, bool value, Error **errp)
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{
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PCMachineState *pcms = PC_MACHINE(obj);
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pcms->pit_enabled = value;
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}
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static bool pc_machine_get_hpet(Object *obj, Error **errp)
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{
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PCMachineState *pcms = PC_MACHINE(obj);
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@ -1707,7 +1695,6 @@ static void pc_machine_initfn(Object *obj)
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pcms->acpi_build_enabled = PC_MACHINE_GET_CLASS(pcms)->has_acpi_build;
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pcms->smbus_enabled = true;
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pcms->sata_enabled = true;
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pcms->pit_enabled = true;
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pcms->i8042_enabled = true;
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pcms->max_fw_size = 8 * MiB;
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#ifdef CONFIG_HPET
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@ -1836,11 +1823,6 @@ static void pc_machine_class_init(ObjectClass *oc, void *data)
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object_class_property_set_description(oc, PC_MACHINE_SATA,
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"Enable/disable Serial ATA bus");
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object_class_property_add_bool(oc, PC_MACHINE_PIT,
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pc_machine_get_pit, pc_machine_set_pit);
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object_class_property_set_description(oc, PC_MACHINE_PIT,
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"Enable/disable Intel 8254 programmable interval timer emulation");
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object_class_property_add_bool(oc, "hpet",
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pc_machine_get_hpet, pc_machine_set_hpet);
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object_class_property_set_description(oc, "hpet",
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@ -1244,6 +1244,23 @@ static void x86_machine_set_acpi(Object *obj, Visitor *v, const char *name,
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visit_type_OnOffAuto(v, name, &x86ms->acpi, errp);
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}
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static void x86_machine_get_pit(Object *obj, Visitor *v, const char *name,
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void *opaque, Error **errp)
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{
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X86MachineState *x86ms = X86_MACHINE(obj);
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OnOffAuto pit = x86ms->pit;
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visit_type_OnOffAuto(v, name, &pit, errp);
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}
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static void x86_machine_set_pit(Object *obj, Visitor *v, const char *name,
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void *opaque, Error **errp)
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{
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X86MachineState *x86ms = X86_MACHINE(obj);;
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visit_type_OnOffAuto(v, name, &x86ms->pit, errp);
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}
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static char *x86_machine_get_oem_id(Object *obj, Error **errp)
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{
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X86MachineState *x86ms = X86_MACHINE(obj);
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@ -1333,6 +1350,7 @@ static void x86_machine_initfn(Object *obj)
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x86ms->smm = ON_OFF_AUTO_AUTO;
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x86ms->acpi = ON_OFF_AUTO_AUTO;
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x86ms->pit = ON_OFF_AUTO_AUTO;
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x86ms->pci_irq_mask = ACPI_BUILD_PCI_IRQS;
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x86ms->oem_id = g_strndup(ACPI_BUILD_APPNAME6, 6);
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x86ms->oem_table_id = g_strndup(ACPI_BUILD_APPNAME8, 8);
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@ -1364,6 +1382,13 @@ static void x86_machine_class_init(ObjectClass *oc, void *data)
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object_class_property_set_description(oc, X86_MACHINE_ACPI,
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"Enable ACPI");
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object_class_property_add(oc, X86_MACHINE_PIT, "OnOffAuto",
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x86_machine_get_pit,
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x86_machine_set_pit,
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NULL, NULL);
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object_class_property_set_description(oc, X86_MACHINE_PIT,
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"Enable i8254 PIT");
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object_class_property_add_str(oc, X86_MACHINE_OEM_ID,
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x86_machine_get_oem_id,
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x86_machine_set_oem_id);
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@ -67,7 +67,6 @@
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#define PCIE_ECAM_SIZE 0x10000000
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/* Machine type options */
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#define MICROVM_MACHINE_PIT "pit"
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#define MICROVM_MACHINE_PIC "pic"
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#define MICROVM_MACHINE_RTC "rtc"
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#define MICROVM_MACHINE_PCIE "pcie"
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@ -87,7 +86,6 @@ struct MicrovmMachineState {
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/* Machine type options */
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OnOffAuto pic;
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OnOffAuto pit;
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OnOffAuto rtc;
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OnOffAuto pcie;
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OnOffAuto ioapic2;
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@ -46,7 +46,6 @@ typedef struct PCMachineState {
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bool acpi_build_enabled;
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bool smbus_enabled;
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bool sata_enabled;
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bool pit_enabled;
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bool hpet_enabled;
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bool i8042_enabled;
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bool default_bus_bypass_iommu;
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@ -64,7 +63,6 @@ typedef struct PCMachineState {
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#define PC_MACHINE_VMPORT "vmport"
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#define PC_MACHINE_SMBUS "smbus"
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#define PC_MACHINE_SATA "sata"
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#define PC_MACHINE_PIT "pit"
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#define PC_MACHINE_I8042 "i8042"
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#define PC_MACHINE_MAX_FW_SIZE "max-fw-size"
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#define PC_MACHINE_SMBIOS_EP "smbios-entry-point-type"
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@ -65,6 +65,7 @@ struct X86MachineState {
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OnOffAuto smm;
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OnOffAuto acpi;
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OnOffAuto pit;
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char *oem_id;
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char *oem_table_id;
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@ -84,6 +85,7 @@ struct X86MachineState {
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#define X86_MACHINE_SMM "smm"
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#define X86_MACHINE_ACPI "acpi"
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#define X86_MACHINE_PIT "pit"
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#define X86_MACHINE_OEM_ID "x-oem-id"
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#define X86_MACHINE_OEM_TABLE_ID "x-oem-table-id"
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#define X86_MACHINE_BUS_LOCK_RATELIMIT "bus-lock-ratelimit"
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