linux-user pull request 20220324
Fix MIPS n32 Fix ppoll, epoll_wait, pselect Fix error message in elfload.c Implement ARM __kernel_memory_barrier/__kernel_cmpxchg/__kernel_cmpxchg64 -----BEGIN PGP SIGNATURE----- iQJGBAABCAAwFiEEzS913cjjpNwuT1Fz8ww4vT8vvjwFAmI8Ka0SHGxhdXJlbnRA dml2aWVyLmV1AAoJEPMMOL0/L7489LgP/juiqff3VLmkMt5YnlVJKNDONEBh/O3e vNtts+I3kJcxRNupLcp59avfYIQEy6HlFX2stTTEt06mw7Ll9pQJPUIjI9mToT6a h9KhZoPoIV0nUvteg02Rm94+TlIclsUqp61DwtyyhZE2xAasprirUtojC9zzh7rJ wMiWeJEwQb3aAEM4hrxk9aDZoxqlXMcGRMqO7ptFJh1LQ+oLqTnDMgIb/CCKyV2y mXzESz04mEGyYumzJOxUzb6sAV5W1cgsFWUbNpiXTitJgPi/jrCcsS39RZp5yOc7 +V9uUzMkCfVLRJNpMr506j8DBGL+3TLLggkJkJ0kwlwTo9+pGc79Tu5ZAs7BxILZ 8ptpNtYitKYLJGBSCIqtG9CqBpG2RMsQAPFTe3jg91JE0MpiE8JVqRYMnU0gaEka /15w+CQJprinIQxBo4M3Gjp5tfztWKh5ju3cD9dibYoqjiGxaXOtwgpHwjjKPkJu B8LYyysehoTCwx/3h2H6h9iW3d9a2qxB6fcHkKdWAs1SxI2v+rkE+i1RJl1wb6rB hHwC1zvjkv3FVCcsqYEjGdpnJ6FDyAsIsMjRViALREjl0Y3VzLPPdxbCiBFuv7Ji v4FDF60NlO26rWExl8WJoQRHtz1Qkia3tPgPxTV5+iukvIt6UZILgRB5iZ/JpU+C 6+t3few6PFnI =XlA7 -----END PGP SIGNATURE----- Merge tag 'linux-user-for-7.0-pull-request' of https://gitlab.com/laurent_vivier/qemu into staging linux-user pull request 20220324 Fix MIPS n32 Fix ppoll, epoll_wait, pselect Fix error message in elfload.c Implement ARM __kernel_memory_barrier/__kernel_cmpxchg/__kernel_cmpxchg64 # gpg: Signature made Thu 24 Mar 2022 08:19:57 GMT # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * tag 'linux-user-for-7.0-pull-request' of https://gitlab.com/laurent_vivier/qemu: linux-user/arm: Implement __kernel_cmpxchg64 with host atomics linux-user/arm: Implement __kernel_cmpxchg with host atomics linux-user/arm: Implement __kernel_memory_barrier linux-user: Fix missing space in error message linux-user: Properly handle sigset arg to ppoll linux-user: Properly handle sigset arg to epoll_pwait linux-user: Properly handle sigset arg to pselect linux-user: Split out helpers for sigsuspend linux-user/alpha: Fix sigsuspend for big-endian hosts linux-user: Fix syscall parameter handling for MIPS n32 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
commit
9c72129150
@ -75,10 +75,70 @@
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put_user_u16(__x, (gaddr)); \
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})
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/* Commpage handling -- there is no commpage for AArch64 */
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/*
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* Similar to code in accel/tcg/user-exec.c, but outside the execution loop.
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* Must be called with mmap_lock.
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* We get the PC of the entry address - which is as good as anything,
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* on a real kernel what you get depends on which mode it uses.
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*/
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static void *atomic_mmu_lookup(CPUArchState *env, uint32_t addr, int size)
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{
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int need_flags = PAGE_READ | PAGE_WRITE_ORG | PAGE_VALID;
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int page_flags;
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/* Enforce guest required alignment. */
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if (unlikely(addr & (size - 1))) {
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force_sig_fault(TARGET_SIGBUS, TARGET_BUS_ADRALN, addr);
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return NULL;
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}
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page_flags = page_get_flags(addr);
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if (unlikely((page_flags & need_flags) != need_flags)) {
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force_sig_fault(TARGET_SIGSEGV,
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page_flags & PAGE_VALID ?
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TARGET_SEGV_ACCERR : TARGET_SEGV_MAPERR, addr);
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return NULL;
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}
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return g2h(env_cpu(env), addr);
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}
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/*
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* See the Linux kernel's Documentation/arm/kernel_user_helpers.txt
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* See the Linux kernel's Documentation/arm/kernel_user_helpers.rst
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* Input:
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* r0 = oldval
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* r1 = newval
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* r2 = pointer to target value
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*
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* Output:
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* r0 = 0 if *ptr was changed, non-0 if no exchange happened
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* C set if *ptr was changed, clear if no exchange happened
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*/
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static void arm_kernel_cmpxchg32_helper(CPUARMState *env)
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{
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uint32_t oldval, newval, val, addr, cpsr, *host_addr;
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oldval = env->regs[0];
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newval = env->regs[1];
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addr = env->regs[2];
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mmap_lock();
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host_addr = atomic_mmu_lookup(env, addr, 4);
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if (!host_addr) {
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mmap_unlock();
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return;
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}
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val = qatomic_cmpxchg__nocheck(host_addr, oldval, newval);
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mmap_unlock();
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cpsr = (val == oldval) * CPSR_C;
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cpsr_write(env, cpsr, CPSR_C, CPSRWriteByInstr);
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env->regs[0] = cpsr ? 0 : -1;
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}
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/*
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* See the Linux kernel's Documentation/arm/kernel_user_helpers.rst
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* Input:
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* r0 = pointer to oldval
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* r1 = pointer to newval
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@ -95,57 +155,54 @@ static void arm_kernel_cmpxchg64_helper(CPUARMState *env)
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{
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uint64_t oldval, newval, val;
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uint32_t addr, cpsr;
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uint64_t *host_addr;
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/* Based on the 32 bit code in do_kernel_trap */
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addr = env->regs[0];
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if (get_user_u64(oldval, addr)) {
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goto segv;
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}
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/* XXX: This only works between threads, not between processes.
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It's probably possible to implement this with native host
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operations. However things like ldrex/strex are much harder so
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there's not much point trying. */
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start_exclusive();
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cpsr = cpsr_read(env);
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addr = env->regs[1];
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if (get_user_u64(newval, addr)) {
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goto segv;
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}
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mmap_lock();
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addr = env->regs[2];
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if (get_user_u64(oldval, env->regs[0])) {
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env->exception.vaddress = env->regs[0];
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goto segv;
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};
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if (get_user_u64(newval, env->regs[1])) {
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env->exception.vaddress = env->regs[1];
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goto segv;
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};
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if (get_user_u64(val, addr)) {
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env->exception.vaddress = addr;
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goto segv;
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host_addr = atomic_mmu_lookup(env, addr, 8);
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if (!host_addr) {
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mmap_unlock();
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return;
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}
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#ifdef CONFIG_ATOMIC64
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val = qatomic_cmpxchg__nocheck(host_addr, oldval, newval);
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cpsr = (val == oldval) * CPSR_C;
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#else
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/*
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* This only works between threads, not between processes, but since
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* the host has no 64-bit cmpxchg, it is the best that we can do.
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*/
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start_exclusive();
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val = *host_addr;
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if (val == oldval) {
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val = newval;
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if (put_user_u64(val, addr)) {
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env->exception.vaddress = addr;
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goto segv;
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};
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env->regs[0] = 0;
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cpsr |= CPSR_C;
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*host_addr = newval;
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cpsr = CPSR_C;
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} else {
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env->regs[0] = -1;
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cpsr &= ~CPSR_C;
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cpsr = 0;
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}
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cpsr_write(env, cpsr, CPSR_C, CPSRWriteByInstr);
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end_exclusive();
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#endif
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mmap_unlock();
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cpsr_write(env, cpsr, CPSR_C, CPSRWriteByInstr);
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env->regs[0] = cpsr ? 0 : -1;
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return;
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segv:
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end_exclusive();
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/* We get the PC of the entry address - which is as good as anything,
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on a real kernel what you get depends on which mode it uses. */
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/* XXX: check env->error_code */
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force_sig_fault(TARGET_SIGSEGV, TARGET_SEGV_MAPERR,
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env->exception.vaddress);
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segv:
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force_sig_fault(TARGET_SIGSEGV,
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page_get_flags(addr) & PAGE_VALID ?
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TARGET_SEGV_ACCERR : TARGET_SEGV_MAPERR, addr);
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}
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/* Handle a jump to the kernel code page. */
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@ -153,36 +210,13 @@ static int
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do_kernel_trap(CPUARMState *env)
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{
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uint32_t addr;
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uint32_t cpsr;
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uint32_t val;
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switch (env->regs[15]) {
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case 0xffff0fa0: /* __kernel_memory_barrier */
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/* ??? No-op. Will need to do better for SMP. */
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smp_mb();
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break;
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case 0xffff0fc0: /* __kernel_cmpxchg */
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/* XXX: This only works between threads, not between processes.
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It's probably possible to implement this with native host
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operations. However things like ldrex/strex are much harder so
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there's not much point trying. */
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start_exclusive();
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cpsr = cpsr_read(env);
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addr = env->regs[2];
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/* FIXME: This should SEGV if the access fails. */
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if (get_user_u32(val, addr))
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val = ~env->regs[0];
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if (val == env->regs[0]) {
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val = env->regs[1];
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/* FIXME: Check for segfaults. */
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put_user_u32(val, addr);
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env->regs[0] = 0;
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cpsr |= CPSR_C;
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} else {
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env->regs[0] = -1;
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cpsr &= ~CPSR_C;
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}
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cpsr_write(env, cpsr, CPSR_C, CPSRWriteByInstr);
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end_exclusive();
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arm_kernel_cmpxchg32_helper(env);
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break;
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case 0xffff0fe0: /* __kernel_get_tls */
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env->regs[0] = cpu_get_tls(env);
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@ -2504,7 +2504,7 @@ static void pgb_reserved_va(const char *image_name, abi_ulong guest_loaddr,
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addr = mmap(test, reserved_va, PROT_NONE, flags, -1, 0);
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if (addr == MAP_FAILED || addr != test) {
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error_report("Unable to reserve 0x%lx bytes of virtual address "
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"space at %p (%s) for use as guest address space (check your"
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"space at %p (%s) for use as guest address space (check your "
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"virtual memory ulimit setting, min_mmap_addr or reserve less "
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"using -R option)", reserved_va, test, strerror(errno));
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exit(EXIT_FAILURE);
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@ -92,4 +92,30 @@ abi_long do_swapcontext(CPUArchState *env, abi_ulong uold_ctx,
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*/
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int block_signals(void); /* Returns non zero if signal pending */
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/**
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* process_sigsuspend_mask: read and apply syscall-local signal mask
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*
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* Read the guest signal mask from @sigset, length @sigsize.
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* Convert that to a host signal mask and save it to sigpending_mask.
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*
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* Return value: negative target errno, or zero;
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* store &sigpending_mask into *pset on success.
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*/
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int process_sigsuspend_mask(sigset_t **pset, target_ulong sigset,
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target_ulong sigsize);
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/**
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* finish_sigsuspend_mask: finish a sigsuspend-like syscall
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*
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* Set in_sigsuspend if we need to use the modified sigset
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* during process_pending_signals.
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*/
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static inline void finish_sigsuspend_mask(int ret)
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{
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if (ret != -QEMU_ERESTARTSYS) {
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TaskState *ts = (TaskState *)thread_cpu->opaque;
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ts->in_sigsuspend = 1;
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}
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}
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#endif
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@ -1199,3 +1199,26 @@ void process_pending_signals(CPUArchState *cpu_env)
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}
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ts->in_sigsuspend = 0;
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}
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int process_sigsuspend_mask(sigset_t **pset, target_ulong sigset,
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target_ulong sigsize)
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{
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TaskState *ts = (TaskState *)thread_cpu->opaque;
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sigset_t *host_set = &ts->sigsuspend_mask;
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target_sigset_t *target_sigset;
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if (sigsize != sizeof(*target_sigset)) {
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/* Like the kernel, we enforce correct size sigsets */
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return -TARGET_EINVAL;
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}
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target_sigset = lock_user(VERIFY_READ, sigset, sigsize, 1);
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if (!target_sigset) {
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return -TARGET_EFAULT;
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}
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target_to_host_sigset(host_set, target_sigset);
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unlock_user(target_sigset, sigset, 0);
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*pset = host_set;
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return 0;
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}
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|
@ -1391,14 +1391,12 @@ static abi_long do_pselect6(abi_long arg1, abi_long arg2, abi_long arg3,
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* The 6th arg is actually two args smashed together,
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* so we cannot use the C library.
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*/
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sigset_t set;
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struct {
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sigset_t *set;
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size_t size;
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} sig, *sig_ptr;
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abi_ulong arg_sigset, arg_sigsize, *arg7;
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target_sigset_t *target_sigset;
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n = arg1;
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rfd_addr = arg2;
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@ -1439,10 +1437,8 @@ static abi_long do_pselect6(abi_long arg1, abi_long arg2, abi_long arg3,
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}
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/* Extract the two packed args for the sigset */
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sig_ptr = NULL;
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if (arg6) {
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sig_ptr = &sig;
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sig.size = SIGSET_T_SIZE;
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arg7 = lock_user(VERIFY_READ, arg6, sizeof(*arg7) * 2, 1);
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if (!arg7) {
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return -TARGET_EFAULT;
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@ -1452,28 +1448,22 @@ static abi_long do_pselect6(abi_long arg1, abi_long arg2, abi_long arg3,
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unlock_user(arg7, arg6, 0);
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if (arg_sigset) {
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sig.set = &set;
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if (arg_sigsize != sizeof(*target_sigset)) {
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/* Like the kernel, we enforce correct size sigsets */
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return -TARGET_EINVAL;
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||||
ret = process_sigsuspend_mask(&sig.set, arg_sigset, arg_sigsize);
|
||||
if (ret != 0) {
|
||||
return ret;
|
||||
}
|
||||
target_sigset = lock_user(VERIFY_READ, arg_sigset,
|
||||
sizeof(*target_sigset), 1);
|
||||
if (!target_sigset) {
|
||||
return -TARGET_EFAULT;
|
||||
}
|
||||
target_to_host_sigset(&set, target_sigset);
|
||||
unlock_user(target_sigset, arg_sigset, 0);
|
||||
} else {
|
||||
sig.set = NULL;
|
||||
sig_ptr = &sig;
|
||||
sig.size = SIGSET_T_SIZE;
|
||||
}
|
||||
} else {
|
||||
sig_ptr = NULL;
|
||||
}
|
||||
|
||||
ret = get_errno(safe_pselect6(n, rfds_ptr, wfds_ptr, efds_ptr,
|
||||
ts_ptr, sig_ptr));
|
||||
|
||||
if (sig_ptr) {
|
||||
finish_sigsuspend_mask(ret);
|
||||
}
|
||||
|
||||
if (!is_error(ret)) {
|
||||
if (rfd_addr && copy_to_user_fdset(rfd_addr, &rfds, n)) {
|
||||
return -TARGET_EFAULT;
|
||||
@ -1529,8 +1519,7 @@ static abi_long do_ppoll(abi_long arg1, abi_long arg2, abi_long arg3,
|
||||
}
|
||||
if (ppoll) {
|
||||
struct timespec _timeout_ts, *timeout_ts = &_timeout_ts;
|
||||
target_sigset_t *target_set;
|
||||
sigset_t _set, *set = &_set;
|
||||
sigset_t *set = NULL;
|
||||
|
||||
if (arg3) {
|
||||
if (time64) {
|
||||
@ -1549,25 +1538,19 @@ static abi_long do_ppoll(abi_long arg1, abi_long arg2, abi_long arg3,
|
||||
}
|
||||
|
||||
if (arg4) {
|
||||
if (arg5 != sizeof(target_sigset_t)) {
|
||||
ret = process_sigsuspend_mask(&set, arg4, arg5);
|
||||
if (ret != 0) {
|
||||
unlock_user(target_pfd, arg1, 0);
|
||||
return -TARGET_EINVAL;
|
||||
return ret;
|
||||
}
|
||||
|
||||
target_set = lock_user(VERIFY_READ, arg4,
|
||||
sizeof(target_sigset_t), 1);
|
||||
if (!target_set) {
|
||||
unlock_user(target_pfd, arg1, 0);
|
||||
return -TARGET_EFAULT;
|
||||
}
|
||||
target_to_host_sigset(set, target_set);
|
||||
} else {
|
||||
set = NULL;
|
||||
}
|
||||
|
||||
ret = get_errno(safe_ppoll(pfd, nfds, timeout_ts,
|
||||
set, SIGSET_T_SIZE));
|
||||
|
||||
if (set) {
|
||||
finish_sigsuspend_mask(ret);
|
||||
}
|
||||
if (!is_error(ret) && arg3) {
|
||||
if (time64) {
|
||||
if (host_to_target_timespec64(arg3, timeout_ts)) {
|
||||
@ -1579,9 +1562,6 @@ static abi_long do_ppoll(abi_long arg1, abi_long arg2, abi_long arg3,
|
||||
}
|
||||
}
|
||||
}
|
||||
if (arg4) {
|
||||
unlock_user(target_set, arg4, 0);
|
||||
}
|
||||
} else {
|
||||
struct timespec ts, *pts;
|
||||
|
||||
@ -9557,40 +9537,35 @@ static abi_long do_syscall1(void *cpu_env, int num, abi_long arg1,
|
||||
#ifdef TARGET_NR_sigsuspend
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||||
case TARGET_NR_sigsuspend:
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||||
{
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||||
TaskState *ts = cpu->opaque;
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||||
sigset_t *set;
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||||
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||||
#if defined(TARGET_ALPHA)
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||||
abi_ulong mask = arg1;
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||||
target_to_host_old_sigset(&ts->sigsuspend_mask, &mask);
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||||
TaskState *ts = cpu->opaque;
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||||
/* target_to_host_old_sigset will bswap back */
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||||
abi_ulong mask = tswapal(arg1);
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||||
set = &ts->sigsuspend_mask;
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||||
target_to_host_old_sigset(set, &mask);
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||||
#else
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||||
if (!(p = lock_user(VERIFY_READ, arg1, sizeof(target_sigset_t), 1)))
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||||
return -TARGET_EFAULT;
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||||
target_to_host_old_sigset(&ts->sigsuspend_mask, p);
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||||
unlock_user(p, arg1, 0);
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||||
#endif
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||||
ret = get_errno(safe_rt_sigsuspend(&ts->sigsuspend_mask,
|
||||
SIGSET_T_SIZE));
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||||
if (ret != -QEMU_ERESTARTSYS) {
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||||
ts->in_sigsuspend = 1;
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||||
ret = process_sigsuspend_mask(&set, arg1, sizeof(target_sigset_t));
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||||
if (ret != 0) {
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||||
return ret;
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||||
}
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||||
#endif
|
||||
ret = get_errno(safe_rt_sigsuspend(set, SIGSET_T_SIZE));
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||||
finish_sigsuspend_mask(ret);
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||||
}
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||||
return ret;
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||||
#endif
|
||||
case TARGET_NR_rt_sigsuspend:
|
||||
{
|
||||
TaskState *ts = cpu->opaque;
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||||
sigset_t *set;
|
||||
|
||||
if (arg2 != sizeof(target_sigset_t)) {
|
||||
return -TARGET_EINVAL;
|
||||
}
|
||||
if (!(p = lock_user(VERIFY_READ, arg1, sizeof(target_sigset_t), 1)))
|
||||
return -TARGET_EFAULT;
|
||||
target_to_host_sigset(&ts->sigsuspend_mask, p);
|
||||
unlock_user(p, arg1, 0);
|
||||
ret = get_errno(safe_rt_sigsuspend(&ts->sigsuspend_mask,
|
||||
SIGSET_T_SIZE));
|
||||
if (ret != -QEMU_ERESTARTSYS) {
|
||||
ts->in_sigsuspend = 1;
|
||||
ret = process_sigsuspend_mask(&set, arg1, arg2);
|
||||
if (ret != 0) {
|
||||
return ret;
|
||||
}
|
||||
ret = get_errno(safe_rt_sigsuspend(set, SIGSET_T_SIZE));
|
||||
finish_sigsuspend_mask(ret);
|
||||
}
|
||||
return ret;
|
||||
#ifdef TARGET_NR_rt_sigtimedwait
|
||||
@ -12709,29 +12684,21 @@ static abi_long do_syscall1(void *cpu_env, int num, abi_long arg1,
|
||||
#if defined(TARGET_NR_epoll_pwait)
|
||||
case TARGET_NR_epoll_pwait:
|
||||
{
|
||||
target_sigset_t *target_set;
|
||||
sigset_t _set, *set = &_set;
|
||||
sigset_t *set = NULL;
|
||||
|
||||
if (arg5) {
|
||||
if (arg6 != sizeof(target_sigset_t)) {
|
||||
ret = -TARGET_EINVAL;
|
||||
ret = process_sigsuspend_mask(&set, arg5, arg6);
|
||||
if (ret != 0) {
|
||||
break;
|
||||
}
|
||||
|
||||
target_set = lock_user(VERIFY_READ, arg5,
|
||||
sizeof(target_sigset_t), 1);
|
||||
if (!target_set) {
|
||||
ret = -TARGET_EFAULT;
|
||||
break;
|
||||
}
|
||||
target_to_host_sigset(set, target_set);
|
||||
unlock_user(target_set, arg5, 0);
|
||||
} else {
|
||||
set = NULL;
|
||||
}
|
||||
|
||||
ret = get_errno(safe_epoll_pwait(epfd, ep, maxevents, timeout,
|
||||
set, SIGSET_T_SIZE));
|
||||
|
||||
if (set) {
|
||||
finish_sigsuspend_mask(ret);
|
||||
}
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
|
@ -112,7 +112,7 @@ static inline int is_error(abi_long ret)
|
||||
return (abi_ulong)ret >= (abi_ulong)(-4096);
|
||||
}
|
||||
|
||||
#if TARGET_ABI_BITS == 32
|
||||
#if (TARGET_ABI_BITS == 32) && !defined(TARGET_ABI_MIPSN32)
|
||||
static inline uint64_t target_offset64(uint32_t word0, uint32_t word1)
|
||||
{
|
||||
#ifdef TARGET_WORDS_BIGENDIAN
|
||||
@ -121,7 +121,7 @@ static inline uint64_t target_offset64(uint32_t word0, uint32_t word1)
|
||||
return ((uint64_t)word1 << 32) | word0;
|
||||
#endif
|
||||
}
|
||||
#else /* TARGET_ABI_BITS == 32 */
|
||||
#else /* TARGET_ABI_BITS == 32 && !defined(TARGET_ABI_MIPSN32) */
|
||||
static inline uint64_t target_offset64(uint64_t word0, uint64_t word1)
|
||||
{
|
||||
return word0;
|
||||
@ -136,7 +136,7 @@ static inline int regpairs_aligned(void *cpu_env, int num)
|
||||
{
|
||||
return ((((CPUARMState *)cpu_env)->eabi) == 1) ;
|
||||
}
|
||||
#elif defined(TARGET_MIPS) && (TARGET_ABI_BITS == 32)
|
||||
#elif defined(TARGET_MIPS) && defined(TARGET_ABI_MIPSO32)
|
||||
static inline int regpairs_aligned(void *cpu_env, int num) { return 1; }
|
||||
#elif defined(TARGET_PPC) && !defined(TARGET_PPC64)
|
||||
/*
|
||||
|
Loading…
Reference in New Issue
Block a user