mirrors/qemu
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

vt82c686: Correctly reset all registers to default values on reset

Browse Source 
Reset the registers in the DeviceReset() handler which is called
on each device reset, not in DeviceRealize() which is called once.

Bit 0 of 'Power Mgmt I/O Base' register (offset 0x48) is always set.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <cff9b2442d3e2e1cfbdcbc2dfbb559031b4b1cc1.1610223397.git.balaton@eik.bme.hu>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
[PMD: Split original patch, this is part 3/4 (move to reset), document]
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
This commit is contained in:
BALATON Zoltan 2021-01-09 21:16:36 +01:00 committed by Philippe Mathieu-Daudé
parent 40a0bba1e3
commit 9af8e529b9
1 changed files with 4 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
hw/isa/vt82c686.c
View File

@ -149,9 +149,12 @@ static void vt82c686b_pm_reset(DeviceState *d)
{
VT686PMState *s = VT82C686B_PM(d);
memset(s->dev.config + PCI_CONFIG_HEADER_SIZE, 0,
PCI_CONFIG_SPACE_SIZE - PCI_CONFIG_HEADER_SIZE);
/* Power Management IO base */
pci_set_long(s->dev.config + 0x48, 1);
/* SMBus IO base */
pci_set_long(s->dev.config + 0x90, 1);
s->dev.config[0xd2] = 0;
smb_io_space_update(s);
}
@ -166,9 +169,6 @@ static void vt82c686b_pm_realize(PCIDevice *dev, Error **errp)
pci_set_word(pci_conf + PCI_STATUS, PCI_STATUS_FAST_BACK |
PCI_STATUS_DEVSEL_MEDIUM);
/* 0x48-0x4B is Power Management I/O Base */
pci_set_long(pci_conf + 0x48, 0x00000001);
pm_smbus_init(DEVICE(s), &s->smb, false);
memory_region_add_subregion(pci_address_space_io(dev), 0, &s->smb.io);
memory_region_set_enabled(&s->smb.io, false);