hw/usb/ohci: Add trace points for register access

To help debugging add trace points that print values read from or
written to the device's registers.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <1bb4985e5dfc1df5a290e77f76fd827ae3592ab7.1676916640.git.balaton@eik.bme.hu>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
This commit is contained in:
BALATON Zoltan 2023-02-20 19:19:09 +01:00 committed by Philippe Mathieu-Daudé
parent ef680088f7
commit 9ae8d31d6a
2 changed files with 31 additions and 0 deletions

View File

@ -235,6 +235,24 @@ struct ohci_iso_td {
#define OHCI_HRESET_FSBIR (1 << 0)
static const char *ohci_reg_names[] = {
"HcRevision", "HcControl", "HcCommandStatus", "HcInterruptStatus",
"HcInterruptEnable", "HcInterruptDisable", "HcHCCA", "HcPeriodCurrentED",
"HcControlHeadED", "HcControlCurrentED", "HcBulkHeadED", "HcBulkCurrentED",
"HcDoneHead", "HcFmInterval", "HcFmRemaining", "HcFmNumber",
"HcPeriodicStart", "HcLSThreshold", "HcRhDescriptorA", "HcRhDescriptorB",
"HcRhStatus"
};
static const char *ohci_reg_name(hwaddr addr)
{
if (addr >> 2 < ARRAY_SIZE(ohci_reg_names)) {
return ohci_reg_names[addr >> 2];
} else {
return "<unknown>";
}
}
static void ohci_die(OHCIState *ohci)
{
ohci->ohci_die(ohci);
@ -1478,6 +1496,8 @@ static uint64_t ohci_mem_read(void *opaque,
} else if (addr >= 0x54 && addr < 0x54 + ohci->num_ports * 4) {
/* HcRhPortStatus */
retval = ohci->rhport[(addr - 0x54) >> 2].ctrl | OHCI_PORT_PPS;
trace_usb_ohci_mem_port_read(size, "HcRhPortStatus", (addr - 0x50) >> 2,
addr, addr >> 2, retval);
} else {
switch (addr >> 2) {
case 0: /* HcRevision */
@ -1582,6 +1602,10 @@ static uint64_t ohci_mem_read(void *opaque,
trace_usb_ohci_mem_read_bad_offset(addr);
retval = 0xffffffff;
}
if (addr != 0xc || retval) {
trace_usb_ohci_mem_read(size, ohci_reg_name(addr), addr, addr >> 2,
retval);
}
}
return retval;
@ -1602,10 +1626,13 @@ static void ohci_mem_write(void *opaque,
if (addr >= 0x54 && addr < 0x54 + ohci->num_ports * 4) {
/* HcRhPortStatus */
trace_usb_ohci_mem_port_write(size, "HcRhPortStatus",
(addr - 0x50) >> 2, addr, addr >> 2, val);
ohci_port_set_status(ohci, (addr - 0x54) >> 2, val);
return;
}
trace_usb_ohci_mem_write(size, ohci_reg_name(addr), addr, addr >> 2, val);
switch (addr >> 2) {
case 1: /* HcControl */
ohci_set_ctl(ohci, val);

View File

@ -57,8 +57,12 @@ usb_ohci_ed_read_error(uint32_t addr) "ED read error at 0x%x"
usb_ohci_ed_pkt(uint32_t cur, int h, int c, uint32_t head, uint32_t tail, uint32_t next) "ED @ 0x%.8x h=%u c=%u\n head=0x%.8x tailp=0x%.8x next=0x%.8x"
usb_ohci_ed_pkt_flags(uint32_t fa, uint32_t en, uint32_t d, int s, int k, int f, uint32_t mps) "fa=%u en=%u d=%u s=%u k=%u f=%u mps=%u"
usb_ohci_hcca_read_error(uint32_t addr) "HCCA read error at 0x%x"
usb_ohci_mem_read(uint32_t size, const char *name, uint32_t addr, uint32_t offs, uint32_t val) "%d %s 0x%x %d -> 0x%x"
usb_ohci_mem_port_read(uint32_t size, const char *name, uint32_t port, uint32_t addr, uint32_t offs, uint32_t val) "%d %s[%d] 0x%x %d -> 0x%x"
usb_ohci_mem_read_unaligned(uint32_t addr) "at 0x%x"
usb_ohci_mem_read_bad_offset(uint32_t addr) "0x%x"
usb_ohci_mem_write(uint32_t size, const char *name, uint32_t addr, uint32_t offs, uint32_t val) "%d %s 0x%x %d <- 0x%x"
usb_ohci_mem_port_write(uint32_t size, const char *name, uint32_t port, uint32_t addr, uint32_t offs, uint32_t val) "%d %s[%d] 0x%x %d <- 0x%x"
usb_ohci_mem_write_unaligned(uint32_t addr) "at 0x%x"
usb_ohci_mem_write_bad_offset(uint32_t addr) "0x%x"
usb_ohci_process_lists(uint32_t head, uint32_t cur) "head 0x%x, cur 0x%x"