hw/pci/aer: Add missing routing for AER errors
PCIe r6.0 Figure 6-3 "Pseudo Logic Diagram for Selected Error Message Control and Status Bits" includes a right hand branch under "All PCI Express devices" that allows for messages to be generated or sent onwards without SERR# being set as long as the appropriate per error class bit in the PCIe Device Control Register is set. Implement that branch thus enabling routing of ERR_COR, ERR_NONFATAL and ERR_FATAL under OSes that set these bits appropriately (e.g. Linux) Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Message-Id: <20230302133709.30373-3-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Fan Ni <fan.ni@samsung.com>
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@ -192,8 +192,16 @@ static void pcie_aer_update_uncor_status(PCIDevice *dev)
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static bool
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static bool
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pcie_aer_msg_alldev(PCIDevice *dev, const PCIEAERMsg *msg)
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pcie_aer_msg_alldev(PCIDevice *dev, const PCIEAERMsg *msg)
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{
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{
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uint16_t devctl = pci_get_word(dev->config + dev->exp.exp_cap +
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PCI_EXP_DEVCTL);
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if (!(pcie_aer_msg_is_uncor(msg) &&
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if (!(pcie_aer_msg_is_uncor(msg) &&
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(pci_get_word(dev->config + PCI_COMMAND) & PCI_COMMAND_SERR))) {
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(pci_get_word(dev->config + PCI_COMMAND) & PCI_COMMAND_SERR)) &&
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!((msg->severity == PCI_ERR_ROOT_CMD_NONFATAL_EN) &&
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(devctl & PCI_EXP_DEVCTL_NFERE)) &&
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!((msg->severity == PCI_ERR_ROOT_CMD_COR_EN) &&
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(devctl & PCI_EXP_DEVCTL_CERE)) &&
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!((msg->severity == PCI_ERR_ROOT_CMD_FATAL_EN) &&
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(devctl & PCI_EXP_DEVCTL_FERE))) {
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return false;
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return false;
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}
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}
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