ARM: basic SX1-cellphone sysemu support (Jean-Christophe PLAGNIOL-VILLARD).
The TSC2102 chip is not included in documentation because a patch is pending. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6038 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
balrog
parent
de956597d6
commit
997641a84f
@ -704,7 +704,7 @@ OBJS+= pflash_cfi01.o gumstix.o
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OBJS+= zaurus.o ide.o serial.o nand.o ecc.o spitz.o tosa.o tc6393xb.o
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OBJS+= omap1.o omap_lcdc.o omap_dma.o omap_clk.o omap_mmc.o omap_i2c.o
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OBJS+= omap2.o omap_dss.o soc_dma.o
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OBJS+= palm.o tsc210x.o
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OBJS+= omap_sx1.o palm.o tsc210x.o
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OBJS+= nseries.o blizzard.o onenand.o vga.o cbus.o tusb6010.o usb-musb.o
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OBJS+= tsc2005.o bt-hci-csr.o
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OBJS+= mst_fpga.o mainstone.o
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@ -86,6 +86,10 @@ extern QEMUMachine spitzpda_machine;
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extern QEMUMachine borzoipda_machine;
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extern QEMUMachine terrierpda_machine;
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/* omap_sx1.c */
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extern QEMUMachine sx1_machine_v1;
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extern QEMUMachine sx1_machine_v2;
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/* palm.c */
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extern QEMUMachine palmte_machine;
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238
hw/omap_sx1.c
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238
hw/omap_sx1.c
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@ -0,0 +1,238 @@
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/* omap_sx1.c Support for the Siemens SX1 smartphone emulation.
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*
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* Copyright (C) 2008
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* Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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* Copyright (C) 2007 Vladimir Ananiev <vovan888@gmail.com>
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*
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* based on PalmOne's (TM) PDAs support (palm.c)
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*/
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/*
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* PalmOne's (TM) PDAs.
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*
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* Copyright (C) 2006-2007 Andrzej Zaborowski <balrog@zabor.org>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include "hw.h"
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#include "sysemu.h"
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#include "console.h"
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#include "omap.h"
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#include "boards.h"
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#include "arm-misc.h"
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#include "flash.h"
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/*****************************************************************************/
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/* Siemens SX1 Cellphone V1 */
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/* - ARM OMAP310 processor
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* - SRAM 192 kB
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* - SDRAM 32 MB at 0x10000000
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* - Boot flash 16 MB at 0x00000000
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* - Application flash 8 MB at 0x04000000
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* - 3 serial ports
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* - 1 SecureDigital
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* - 1 LCD display
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* - 1 RTC
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*/
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/*****************************************************************************/
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/* Siemens SX1 Cellphone V2 */
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/* - ARM OMAP310 processor
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* - SRAM 192 kB
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* - SDRAM 32 MB at 0x10000000
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* - Boot flash 32 MB at 0x00000000
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* - 3 serial ports
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* - 1 SecureDigital
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* - 1 LCD display
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* - 1 RTC
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*/
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static uint32_t static_readb(void *opaque, target_phys_addr_t offset)
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{
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uint32_t *val = (uint32_t *) opaque;
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return *val >> ((offset & 3) << 3);
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}
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static uint32_t static_readh(void *opaque, target_phys_addr_t offset)
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{
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uint32_t *val = (uint32_t *) opaque;
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return *val >> ((offset & 1) << 3);
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}
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static uint32_t static_readw(void *opaque, target_phys_addr_t offset)
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{
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uint32_t *val = (uint32_t *) opaque;
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return *val >> ((offset & 0) << 3);
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}
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static void static_write(void *opaque, target_phys_addr_t offset,
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uint32_t value)
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{
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#ifdef SPY
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printf("%s: value %08lx written at " PA_FMT "\n",
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__FUNCTION__, value, offset);
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#endif
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}
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static CPUReadMemoryFunc *static_readfn[] = {
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static_readb,
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static_readh,
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static_readw,
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};
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static CPUWriteMemoryFunc *static_writefn[] = {
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static_write,
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static_write,
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static_write,
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};
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#define sdram_size 0x02000000
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#define sector_size (128 * 1024)
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#define flash0_size (16 * 1024 * 1024)
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#define flash1_size ( 8 * 1024 * 1024)
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#define flash2_size (32 * 1024 * 1024)
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#define total_ram_v1 (sdram_size + flash0_size + flash1_size + OMAP15XX_SRAM_SIZE)
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#define total_ram_v2 (sdram_size + flash2_size + OMAP15XX_SRAM_SIZE)
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static struct arm_boot_info sx1_binfo = {
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.loader_start = OMAP_EMIFF_BASE,
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.ram_size = sdram_size,
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.board_id = 0x265,
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};
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static void sx1_init(ram_addr_t ram_size, int vga_ram_size,
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const char *boot_device, DisplayState *ds,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *initrd_filename, const char *cpu_model,
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const int version)
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{
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struct omap_mpu_state_s *cpu;
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int io;
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static uint32_t cs0val = 0x00213090;
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static uint32_t cs1val = 0x00215070;
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static uint32_t cs2val = 0x00001139;
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static uint32_t cs3val = 0x00001139;
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ram_addr_t phys_flash;
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int index;
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int fl_idx;
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uint32_t flash_size = flash0_size;
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if (version == 2) {
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flash_size = flash2_size;
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}
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cpu = omap310_mpu_init(sx1_binfo.ram_size, ds, cpu_model);
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/* External Flash (EMIFS) */
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cpu_register_physical_memory(OMAP_CS0_BASE, flash_size,
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(phys_flash = qemu_ram_alloc(flash_size)) | IO_MEM_ROM);
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io = cpu_register_io_memory(0, static_readfn, static_writefn, &cs0val);
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cpu_register_physical_memory(OMAP_CS0_BASE + flash_size,
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OMAP_CS0_SIZE - flash_size, io);
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io = cpu_register_io_memory(0, static_readfn, static_writefn, &cs2val);
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cpu_register_physical_memory(OMAP_CS2_BASE, OMAP_CS2_SIZE, io);
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io = cpu_register_io_memory(0, static_readfn, static_writefn, &cs3val);
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cpu_register_physical_memory(OMAP_CS3_BASE, OMAP_CS3_SIZE, io);
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fl_idx = 0;
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if ((index = drive_get_index(IF_PFLASH, 0, fl_idx)) > -1) {
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if (!pflash_cfi01_register(OMAP_CS0_BASE, qemu_ram_alloc(flash_size),
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drives_table[index].bdrv, sector_size, flash_size / sector_size,
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4, 0, 0, 0, 0)) {
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fprintf(stderr, "qemu: Error registering flash memory %d.\n",
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fl_idx);
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}
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fl_idx++;
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}
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if ((version == 1) &&
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(index = drive_get_index(IF_PFLASH, 0, fl_idx)) > -1) {
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cpu_register_physical_memory(OMAP_CS1_BASE, flash1_size,
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(phys_flash = qemu_ram_alloc(flash1_size)) |
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IO_MEM_ROM);
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io = cpu_register_io_memory(0, static_readfn, static_writefn, &cs1val);
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cpu_register_physical_memory(OMAP_CS1_BASE + flash1_size,
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OMAP_CS1_SIZE - flash1_size, io);
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if (!pflash_cfi01_register(OMAP_CS1_BASE, qemu_ram_alloc(flash1_size),
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drives_table[index].bdrv, sector_size, flash1_size / sector_size,
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4, 0, 0, 0, 0)) {
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fprintf(stderr, "qemu: Error registering flash memory %d.\n",
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fl_idx);
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}
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fl_idx++;
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} else {
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io = cpu_register_io_memory(0, static_readfn, static_writefn, &cs1val);
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cpu_register_physical_memory(OMAP_CS1_BASE, OMAP_CS1_SIZE, io);
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}
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if (!kernel_filename && !fl_idx) {
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fprintf(stderr, "Kernel or Flash image must be specified\n");
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exit(1);
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}
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/* Load the kernel. */
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if (kernel_filename) {
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/* Start at bootloader. */
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cpu->env->regs[15] = sx1_binfo.loader_start;
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sx1_binfo.kernel_filename = kernel_filename;
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sx1_binfo.kernel_cmdline = kernel_cmdline;
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sx1_binfo.initrd_filename = initrd_filename;
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arm_load_kernel(cpu->env, &sx1_binfo);
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} else {
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cpu->env->regs[15] = 0x00000000;
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}
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dpy_resize(ds, 640, 480);
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}
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static void sx1_init_v1(ram_addr_t ram_size, int vga_ram_size,
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const char *boot_device, DisplayState *ds,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *initrd_filename, const char *cpu_model)
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{
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sx1_init(ram_size, vga_ram_size, boot_device, ds, kernel_filename,
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kernel_cmdline, initrd_filename, cpu_model, 1);
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}
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static void sx1_init_v2(ram_addr_t ram_size, int vga_ram_size,
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const char *boot_device, DisplayState *ds,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *initrd_filename, const char *cpu_model)
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{
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sx1_init(ram_size, vga_ram_size, boot_device, ds, kernel_filename,
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kernel_cmdline, initrd_filename, cpu_model, 2);
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}
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QEMUMachine sx1_machine_v2 = {
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.name = "sx1",
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.desc = "Siemens SX1 (OMAP310) V2",
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.init = sx1_init_v2,
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.ram_require = total_ram_v2 | RAMSIZE_FIXED,
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};
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QEMUMachine sx1_machine_v1 = {
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.name = "sx1-v1",
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.desc = "Siemens SX1 (OMAP310) V1",
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.init = sx1_init_v1,
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.ram_require = total_ram_v1 | RAMSIZE_FIXED,
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};
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@ -2798,6 +2798,28 @@ MV88W8618 audio controller, WM8750 CODEC and mixer
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2 buttons, 2 navigation wheels with button function
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@end itemize
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The Siemens SX1 models v1 and v2 (default) basic emulation.
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The emulaton includes the following elements:
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@itemize @minus
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@item
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Texas Instruments OMAP310 System-on-chip (ARM 925T core)
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@item
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ROM and RAM memories (ROM firmware image can be loaded with -pflash)
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V1
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1 Flash of 16MB and 1 Flash of 8MB
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V2
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1 Flash of 32MB
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@item
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On-chip LCD controller
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@item
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On-chip Real Time Clock
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@item
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Secure Digital card connected to OMAP MMC/SD host
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@item
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Three on-chip UARTs
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@end itemize
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A Linux 2.6 test image is available on the QEMU web site. More
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information is available in the QEMU mailing-list archive.
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@ -11,6 +11,8 @@ void register_machines(void)
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qemu_register_machine(&spitzpda_machine);
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qemu_register_machine(&borzoipda_machine);
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qemu_register_machine(&terrierpda_machine);
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qemu_register_machine(&sx1_machine_v1);
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qemu_register_machine(&sx1_machine_v2);
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qemu_register_machine(&palmte_machine);
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qemu_register_machine(&n800_machine);
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qemu_register_machine(&n810_machine);
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