From 985a19d6d1d7ab3705bf42698cc95abfbbfa24f8 Mon Sep 17 00:00:00 2001 From: bellard Date: Sun, 18 Jan 2004 22:49:57 +0000 Subject: [PATCH] PowerPC merge (Jocelyn Mayer) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@566 c046a42c-6fe2-441c-8c8c-71466251a162 --- target-ppc/op.c | 7 ------- target-ppc/op_helper.c | 6 +++++- target-ppc/op_mem.h | 13 +++++++++++++ target-ppc/translate.c | 11 +++++++++-- 4 files changed, 27 insertions(+), 10 deletions(-) diff --git a/target-ppc/op.c b/target-ppc/op.c index 28722d6507..98d788585b 100644 --- a/target-ppc/op.c +++ b/target-ppc/op.c @@ -453,13 +453,6 @@ PPC_OP(reset_scrfx) RETURN(); } -/* Set reservation */ -PPC_OP(set_reservation) -{ - regs->reserve = T0 & ~0x03; - RETURN(); -} - /* crf operations */ PPC_OP(getbit_T0) { diff --git a/target-ppc/op_helper.c b/target-ppc/op_helper.c index 5d02dfabe7..a0e9360282 100644 --- a/target-ppc/op_helper.c +++ b/target-ppc/op_helper.c @@ -349,9 +349,13 @@ void do_fnabs (void) } /* Instruction cache invalidation helper */ +#define ICACHE_LINE_SIZE 32 + void do_icbi (void) { - // tb_invalidate_page(T0); + /* Invalidate one cache line */ + T0 &= ~(ICACHE_LINE_SIZE - 1); + tb_invalidate_page_range(T0, T0 + ICACHE_LINE_SIZE); } /* TLB invalidation helpers */ diff --git a/target-ppc/op_mem.h b/target-ppc/op_mem.h index e66a1dbe01..01df45d9cf 100644 --- a/target-ppc/op_mem.h +++ b/target-ppc/op_mem.h @@ -134,6 +134,19 @@ PPC_OP(glue(glue(l, name), MEMSUFFIX)) \ PPC_LDF_OP(fd, ldfq); PPC_LDF_OP(fs, ldfl); +/* Load and set reservation */ +PPC_OP(glue(lwarx, MEMSUFFIX)) +{ + if (T0 & 0x03) { + do_queue_exception(EXCP_ALIGN); + do_process_exceptions(); + } else { + glue(ldl, MEMSUFFIX)((void *)T0); + regs->reserve = T0 & ~0x03; + } + RETURN(); +} + /* Store with reservation */ PPC_OP(glue(stwcx, MEMSUFFIX)) { diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 34f92bd16d..9ad8f6dea1 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -1302,8 +1302,14 @@ GEN_HANDLER(isync, 0x13, 0x16, 0xFF, 0x03FF0801, PPC_MEM) /* lwarx */ #if defined(CONFIG_USER_ONLY) +#define op_lwarx() gen_op_lwarx_raw() #define op_stwcx() gen_op_stwcx_raw() #else +#define op_lwarx() (*gen_op_lwarx[ctx->mem_idx])() +static GenOpFunc *gen_op_lwarx[] = { + &gen_op_lwarx_user, + &gen_op_lwarx_kernel, +}; #define op_stwcx() (*gen_op_stwcx[ctx->mem_idx])() static GenOpFunc *gen_op_stwcx[] = { &gen_op_stwcx_user, @@ -1320,9 +1326,8 @@ GEN_HANDLER(lwarx, 0x1F, 0x14, 0xFF, 0x00000001, PPC_RES) gen_op_load_gpr_T1(rB(ctx->opcode)); gen_op_add(); } - op_ldst(lwz); + op_lwarx(); gen_op_store_T1_gpr(rD(ctx->opcode)); - gen_op_set_reservation(); } /* stwcx. */ @@ -3169,9 +3174,11 @@ int gen_intermediate_code_internal (CPUState *env, TranslationBlock *tb, while (lj <= j) gen_opc_instr_start[lj++] = 0; tb->size = 0; +#if 0 if (loglevel > 0) { page_dump(logfile); } +#endif } else { tb->size = (uint32_t)ctx.nip - pc_start; }