Improve iommu debugging, use register names
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3114 c046a42c-6fe2-441c-8c8c-71466251a162
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8a93e02a93
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21
hw/iommu.c
21
hw/iommu.c
@ -100,7 +100,7 @@ static uint32_t iommu_mem_readw(void *opaque, target_phys_addr_t addr)
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saddr = (addr - s->addr) >> 2;
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switch (saddr) {
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default:
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DPRINTF("read reg[%d] = %x\n", saddr, s->regs[saddr]);
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DPRINTF("read reg[%d] = %x\n", (int)saddr, s->regs[saddr]);
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return s->regs[saddr];
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break;
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}
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@ -113,7 +113,7 @@ static void iommu_mem_writew(void *opaque, target_phys_addr_t addr, uint32_t val
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target_phys_addr_t saddr;
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saddr = (addr - s->addr) >> 2;
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DPRINTF("write reg[%d] = %x\n", saddr, val);
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DPRINTF("write reg[%d] = %x\n", (int)saddr, val);
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switch (saddr) {
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case IOMMU_CTRL:
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switch (val & IOMMU_CTRL_RNGE) {
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@ -143,7 +143,7 @@ static void iommu_mem_writew(void *opaque, target_phys_addr_t addr, uint32_t val
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s->iostart = 0xffffffff80000000ULL;
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break;
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}
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DPRINTF("iostart = %llx\n", s->iostart);
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DPRINTF("iostart = " TARGET_FMT_plx "\n", s->iostart);
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s->regs[saddr] = ((val & IOMMU_CTRL_MASK) | IOMMU_VERSION);
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break;
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case IOMMU_BASE:
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@ -188,12 +188,19 @@ static CPUWriteMemoryFunc *iommu_mem_write[3] = {
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static uint32_t iommu_page_get_flags(IOMMUState *s, target_phys_addr_t addr)
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{
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uint32_t iopte;
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uint32_t iopte, ret;
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#ifdef DEBUG_IOMMU
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target_phys_addr_t pa = addr;
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#endif
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iopte = s->regs[1] << 4;
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iopte = s->regs[IOMMU_BASE] << 4;
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addr &= ~s->iostart;
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iopte += (addr >> (PAGE_SHIFT - 2)) & ~3;
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return ldl_phys(iopte);
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ret = ldl_phys(iopte);
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DPRINTF("get flags addr " TARGET_FMT_plx " => pte %x, *ptes = %x\n", pa,
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iopte, ret);
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return ret;
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}
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static target_phys_addr_t iommu_translate_pa(IOMMUState *s,
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@ -271,7 +278,7 @@ static void iommu_reset(void *opaque)
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memset(s->regs, 0, IOMMU_NREGS * 4);
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s->iostart = 0;
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s->regs[0] = IOMMU_VERSION;
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s->regs[IOMMU_CTRL] = IOMMU_VERSION;
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}
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void *iommu_init(target_phys_addr_t addr)
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