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hw/loongarch: fdt adds Extend I/O Interrupt Controller

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fdt adds Extend I/O Interrupt Controller,
we use 'loongson,ls2k2000-eiointc'.

See:
https://github.com/torvalds/linux/blob/v6.7/drivers/irqchip/irq-loongson-eiointc.c
https://lore.kernel.org/r/764e02d924094580ac0f1d15535f4b98308705c6.1683279769.git.zhoubinbin@loongson.cn

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Message-Id: <20240426091551.2397867-12-gaosong@loongson.cn>
This commit is contained in:
Song Gao 2024-04-26 17:15:45 +08:00
parent a0663efd81
commit 975a5afe37
2 changed files with 30 additions and 1 deletions
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30
hw/loongarch/virt.c
View File

@ -123,6 +123,31 @@ static void fdt_add_cpuic_node(LoongArchMachineState *lams,
g_free(nodename); g_free(nodename);
} }
static void fdt_add_eiointc_node(LoongArchMachineState *lams,
uint32_t *cpuintc_phandle,
uint32_t *eiointc_phandle)
{
MachineState *ms = MACHINE(lams);
char *nodename;
hwaddr extioi_base = APIC_BASE;
hwaddr extioi_size = EXTIOI_SIZE;
*eiointc_phandle = qemu_fdt_alloc_phandle(ms->fdt);
nodename = g_strdup_printf("/eiointc@%" PRIx64, extioi_base);
qemu_fdt_add_subnode(ms->fdt, nodename);
qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle", *eiointc_phandle);
qemu_fdt_setprop_string(ms->fdt, nodename, "compatible",
"loongson,ls2k2000-eiointc");
qemu_fdt_setprop(ms->fdt, nodename, "interrupt-controller", NULL, 0);
qemu_fdt_setprop_cell(ms->fdt, nodename, "#interrupt-cells", 1);
qemu_fdt_setprop_cell(ms->fdt, nodename, "interrupt-parent",
*cpuintc_phandle);
qemu_fdt_setprop_cell(ms->fdt, nodename, "interrupts", 3);
qemu_fdt_setprop_cells(ms->fdt, nodename, "reg", 0x0,
extioi_base, 0x0, extioi_size);
g_free(nodename);
}
static void fdt_add_flash_node(LoongArchMachineState *lams) static void fdt_add_flash_node(LoongArchMachineState *lams)
{ {
MachineState *ms = MACHINE(lams); MachineState *ms = MACHINE(lams);
@ -545,7 +570,7 @@ static void loongarch_irq_init(LoongArchMachineState *lams)
CPULoongArchState *env; CPULoongArchState *env;
CPUState *cpu_state; CPUState *cpu_state;
int cpu, pin, i, start, num; int cpu, pin, i, start, num;
uint32_t cpuintc_phandle; uint32_t cpuintc_phandle, eiointc_phandle;
/* /*
* The connection of interrupts: * The connection of interrupts:
@ -614,6 +639,9 @@ static void loongarch_irq_init(LoongArchMachineState *lams)
} }
} }
/* Add Extend I/O Interrupt Controller node */
fdt_add_eiointc_node(lams, &cpuintc_phandle, &eiointc_phandle);
pch_pic = qdev_new(TYPE_LOONGARCH_PCH_PIC); pch_pic = qdev_new(TYPE_LOONGARCH_PCH_PIC);
num = VIRT_PCH_PIC_IRQ_NUM; num = VIRT_PCH_PIC_IRQ_NUM;
qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num); qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num);

1
include/hw/intc/loongarch_extioi.h
View File

@ -39,6 +39,7 @@
#define EXTIOI_COREISR_END (0xB20 - APIC_OFFSET) #define EXTIOI_COREISR_END (0xB20 - APIC_OFFSET)
#define EXTIOI_COREMAP_START (0xC00 - APIC_OFFSET) #define EXTIOI_COREMAP_START (0xC00 - APIC_OFFSET)
#define EXTIOI_COREMAP_END (0xD00 - APIC_OFFSET) #define EXTIOI_COREMAP_END (0xD00 - APIC_OFFSET)
#define EXTIOI_SIZE 0x800
typedef struct ExtIOICore { typedef struct ExtIOICore {
uint32_t coreisr[EXTIOI_IRQS_GROUP_COUNT]; uint32_t coreisr[EXTIOI_IRQS_GROUP_COUNT];