pcnet: switch to symbolic names for pci registers
No functional changes. I verified that the generated binary does not change. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Juan Quintela <quintela@redhat.com> Acked-by: Glauber Costa <glommer@gmail.com>
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hw/pci.h
1
hw/pci.h
@ -165,6 +165,7 @@ typedef struct PCIIORegion {
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#define PCI_STATUS_66MHZ 0x020
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#define PCI_STATUS_66MHZ 0x020
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#define PCI_STATUS_RESERVED2 0x040
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#define PCI_STATUS_RESERVED2 0x040
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#define PCI_STATUS_FAST_BACK 0x080
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#define PCI_STATUS_FAST_BACK 0x080
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#define PCI_STATUS_DEVSEL_MEDIUM 0x200
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#define PCI_STATUS_DEVSEL 0x600
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#define PCI_STATUS_DEVSEL 0x600
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#define PCI_STATUS_RESERVED_MASK_LO (PCI_STATUS_RESERVED1 | \
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#define PCI_STATUS_RESERVED_MASK_LO (PCI_STATUS_RESERVED1 | \
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26
hw/pcnet.c
26
hw/pcnet.c
@ -1981,24 +1981,32 @@ static int pci_pcnet_init(PCIDevice *pci_dev)
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pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_AMD);
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pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_AMD);
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pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_AMD_LANCE);
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pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_AMD_LANCE);
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*(uint16_t *)&pci_conf[0x04] = cpu_to_le16(0x0007);
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/* TODO: value should be 0 at RST# */
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*(uint16_t *)&pci_conf[0x06] = cpu_to_le16(0x0280);
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pci_set_word(pci_conf + PCI_COMMAND,
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pci_conf[0x08] = 0x10;
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PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
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pci_conf[0x09] = 0x00;
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pci_set_word(pci_conf + PCI_STATUS,
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PCI_STATUS_FAST_BACK | PCI_STATUS_DEVSEL_MEDIUM);
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pci_conf[PCI_REVISION_ID] = 0x10;
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/* TODO: 0 is the default anyway, no need to set it. */
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pci_conf[PCI_CLASS_PROG] = 0x00;
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pci_config_set_class(pci_conf, PCI_CLASS_NETWORK_ETHERNET);
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pci_config_set_class(pci_conf, PCI_CLASS_NETWORK_ETHERNET);
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pci_conf[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; // header_type
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pci_conf[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; // header_type
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*(uint32_t *)&pci_conf[0x10] = cpu_to_le32(0x00000001);
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/* TODO: not necessary, is set when BAR is registered. */
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*(uint32_t *)&pci_conf[0x14] = cpu_to_le32(0x00000000);
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pci_set_long(pci_conf + PCI_BASE_ADDRESS_0, PCI_BASE_ADDRESS_SPACE_IO);
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pci_set_long(pci_conf + PCI_BASE_ADDRESS_0 + 4,
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PCI_BASE_ADDRESS_SPACE_MEMORY);
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pci_conf[0x3d] = 1; // interrupt pin 0
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/* TODO: value must be 0 at RST# */
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pci_conf[0x3e] = 0x06;
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pci_conf[PCI_INTERRUPT_PIN] = 1; // interrupt pin 0
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pci_conf[0x3f] = 0xff;
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pci_conf[PCI_MIN_GNT] = 0x06;
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pci_conf[PCI_MAX_LAT] = 0xff;
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/* Handler for memory-mapped I/O */
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/* Handler for memory-mapped I/O */
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s->mmio_index =
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s->mmio_index =
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cpu_register_io_memory(pcnet_mmio_read, pcnet_mmio_write, &d->state);
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cpu_register_io_memory(pcnet_mmio_read, pcnet_mmio_write, &d->state);
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/* TODO: use pci_dev, avoid cast below. */
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pci_register_bar((PCIDevice *)d, 0, PCNET_IOPORT_SIZE,
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pci_register_bar((PCIDevice *)d, 0, PCNET_IOPORT_SIZE,
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PCI_BASE_ADDRESS_SPACE_IO, pcnet_ioport_map);
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PCI_BASE_ADDRESS_SPACE_IO, pcnet_ioport_map);
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