Improve "ta 0" shutdown

This patch replace the previous implementation with this simplified and
more complete version (no shutdown when psret == 1).

Signed-off-by: Fabien Chouteau <chouteau@adacore.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
Fabien Chouteau 2011-11-03 16:10:04 +01:00 committed by Blue Swirl
parent 9643c25f8d
commit 96d922a654
4 changed files with 9 additions and 18 deletions

View File

@ -34,13 +34,6 @@ void helper_debug(CPUState *env)
cpu_loop_exit(env); cpu_loop_exit(env);
} }
void helper_shutdown(void)
{
#if !defined(CONFIG_USER_ONLY)
qemu_system_shutdown_request();
#endif
}
#ifdef TARGET_SPARC64 #ifdef TARGET_SPARC64
target_ulong helper_popc(target_ulong val) target_ulong helper_popc(target_ulong val)
{ {

View File

@ -79,7 +79,6 @@ DEF_HELPER_1(fcmpeq_fcc2, void, env)
DEF_HELPER_1(fcmpeq_fcc3, void, env) DEF_HELPER_1(fcmpeq_fcc3, void, env)
#endif #endif
DEF_HELPER_2(raise_exception, void, env, int) DEF_HELPER_2(raise_exception, void, env, int)
DEF_HELPER_0(shutdown, void)
#define F_HELPER_0_1(name) DEF_HELPER_1(f ## name, void, env) #define F_HELPER_0_1(name) DEF_HELPER_1(f ## name, void, env)
DEF_HELPER_3(faddd, f64, env, f64, f64) DEF_HELPER_3(faddd, f64, env, f64, f64)

View File

@ -19,6 +19,7 @@
#include "cpu.h" #include "cpu.h"
#include "trace.h" #include "trace.h"
#include "sysemu.h"
//#define DEBUG_PCALL //#define DEBUG_PCALL
@ -100,8 +101,13 @@ void do_interrupt(CPUState *env)
#endif #endif
#if !defined(CONFIG_USER_ONLY) #if !defined(CONFIG_USER_ONLY)
if (env->psret == 0) { if (env->psret == 0) {
cpu_abort(env, "Trap 0x%02x while interrupts disabled, Error state", if (env->exception_index == 0x80 &&
env->exception_index); env->def->features & CPU_FEATURE_TA0_SHUTDOWN) {
qemu_system_shutdown_request();
} else {
cpu_abort(env, "Trap 0x%02x while interrupts disabled, Error state",
env->exception_index);
}
return; return;
} }
#endif #endif

View File

@ -2518,15 +2518,8 @@ static void disas_sparc_insn(DisasContext * dc)
tcg_gen_andi_tl(cpu_dst, cpu_dst, V8_TRAP_MASK); tcg_gen_andi_tl(cpu_dst, cpu_dst, V8_TRAP_MASK);
tcg_gen_addi_tl(cpu_dst, cpu_dst, TT_TRAP); tcg_gen_addi_tl(cpu_dst, cpu_dst, TT_TRAP);
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_dst); tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_dst);
gen_helper_raise_exception(cpu_env, cpu_tmp32);
if (rs2 == 0 &&
dc->def->features & CPU_FEATURE_TA0_SHUTDOWN) {
gen_helper_shutdown();
} else {
gen_helper_raise_exception(cpu_env, cpu_tmp32);
}
} else if (cond != 0) { } else if (cond != 0) {
TCGv r_cond = tcg_temp_new(); TCGv r_cond = tcg_temp_new();
int l1; int l1;