From f244115cbd7530893e720cd1302308e4390c5ef7 Mon Sep 17 00:00:00 2001 From: Thomas Huth Date: Wed, 8 Mar 2017 20:58:43 +0100 Subject: [PATCH 1/4] target/ppc: Fix wrong number of UAMR register The SPR UAMR has the number 13, and not 12. (Fortunately it seems like Linux is not using this register yet - only the privileged version with number 29 ... that's why nobody noticed this problem yet) Signed-off-by: Thomas Huth Signed-off-by: David Gibson --- target/ppc/cpu.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 7c4a1f50b3..5ee33b3fd3 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -1408,7 +1408,7 @@ int ppc_compat_max_threads(PowerPCCPU *cpu); #define SPR_601_UDECR (0x006) #define SPR_LR (0x008) #define SPR_CTR (0x009) -#define SPR_UAMR (0x00C) +#define SPR_UAMR (0x00D) #define SPR_DSCR (0x011) #define SPR_DSISR (0x012) #define SPR_DAR (0x013) /* DAE for PowerPC 601 */ From 38a61d34875335717f22e3a0eb1e0d5df4f62def Mon Sep 17 00:00:00 2001 From: Nikunj A Dadhania Date: Mon, 13 Mar 2017 15:01:04 +0530 Subject: [PATCH 2/4] target/ppc: fix cpu_ov setting for 32-bit A bug was introduced in following commit: dc0ad84 target/ppc: update overflow flags for add/sub As for 32-bit ppc target extracting bit 63 for overflow is not correct. Made it dependent on TARGET_LOG_BITS. This had broken booting MacOS 9.2.1 image Reported-by: Mark Cave-Ayland Signed-off-by: Nikunj A Dadhania Signed-off-by: David Gibson Tested-by: Mark Cave-Ayland --- target/ppc/translate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/ppc/translate.c b/target/ppc/translate.c index b6abc60a00..f40b5a1abf 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -818,7 +818,7 @@ static inline void gen_op_arith_compute_ov(DisasContext *ctx, TCGv arg0, if (is_isa300(ctx)) { tcg_gen_extract_tl(cpu_ov32, cpu_ov, 31, 1); } - tcg_gen_extract_tl(cpu_ov, cpu_ov, 63, 1); + tcg_gen_extract_tl(cpu_ov, cpu_ov, TARGET_LONG_BITS - 1, 1); } tcg_gen_or_tl(cpu_so, cpu_so, cpu_ov); } From 82516263cead40ac240ae5fb2a6f5fc0fda9614c Mon Sep 17 00:00:00 2001 From: David Gibson Date: Tue, 14 Mar 2017 11:54:17 +1100 Subject: [PATCH 3/4] pseries: Don't expose PCIe extended config space on older machine types bb9986452 "spapr_pci: Advertise access to PCIe extended config space" allowed guests to access the extended config space of PCI Express devices via the PAPR interfaces, even though the paravirtualized bus mostly acts like plain PCI. However, that patch enabled access unconditionally, including for existing machine types, which is an unwise change in behaviour. This patch limits the change to pseries-2.9 (and later) machine types. Suggested-by: Andrea Bolognani Signed-off-by: David Gibson --- hw/ppc/spapr.c | 9 +++++++-- hw/ppc/spapr_pci.c | 4 +++- include/hw/pci-host/spapr.h | 2 ++ 3 files changed, 12 insertions(+), 3 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index c3bb991605..6ee566d658 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -3163,8 +3163,13 @@ DEFINE_SPAPR_MACHINE(2_9, "2.9", true); /* * pseries-2.8 */ -#define SPAPR_COMPAT_2_8 \ - HW_COMPAT_2_8 +#define SPAPR_COMPAT_2_8 \ + HW_COMPAT_2_8 \ + { \ + .driver = TYPE_SPAPR_PCI_HOST_BRIDGE, \ + .property = "pcie-extended-configuration-space", \ + .value = "off", \ + }, static void spapr_machine_2_8_instance_options(MachineState *machine) { diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index 919d3c2c59..98c52e411f 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -1321,7 +1321,7 @@ static int spapr_populate_pci_child_dt(PCIDevice *dev, void *fdt, int offset, _FDT(fdt_setprop(fdt, offset, "assigned-addresses", (uint8_t *)rp.assigned, rp.assigned_len)); - if (pci_is_express(dev)) { + if (sphb->pcie_ecs && pci_is_express(dev)) { _FDT(fdt_setprop_cell(fdt, offset, "ibm,pci-config-space-type", 0x1)); } @@ -1858,6 +1858,8 @@ static Property spapr_phb_properties[] = { DEFINE_PROP_UINT32("numa_node", sPAPRPHBState, numa_node, -1), DEFINE_PROP_BOOL("pre-2.8-migration", sPAPRPHBState, pre_2_8_migration, false), + DEFINE_PROP_BOOL("pcie-extended-configuration-space", sPAPRPHBState, + pcie_ecs, true), DEFINE_PROP_END_OF_LIST(), }; diff --git a/include/hw/pci-host/spapr.h b/include/hw/pci-host/spapr.h index dfa76143f3..1c2e970da2 100644 --- a/include/hw/pci-host/spapr.h +++ b/include/hw/pci-host/spapr.h @@ -80,6 +80,8 @@ struct sPAPRPHBState { uint32_t numa_node; + bool pcie_ecs; /* Allow access to PCIe extended config space? */ + /* Fields for migration compatibility hacks */ bool pre_2_8_migration; uint32_t mig_liobn; From 28df75d8d1aebdb09a2cc511c0b97690eac0b7a7 Mon Sep 17 00:00:00 2001 From: David Gibson Date: Tue, 14 Mar 2017 12:24:29 +1100 Subject: [PATCH 4/4] dtc: Update submodule to avoid build errors The currently included version of the dtc/libfdt submodule has some build errors on certain distributions (including RHEL7). This is due to some poorly named macros in libfdt.h; they're designed for use with the sparse static checker, but use reserved names which conflict with some symbols in the standard headers. That's been corrected in upstream dtc, this updates the qemu submodule to bring the fix to qemu. Signed-off-by: David Gibson --- dtc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/dtc b/dtc index fa8bc7f928..558cd81bdd 160000 --- a/dtc +++ b/dtc @@ -1 +1 @@ -Subproject commit fa8bc7f928ac25f23532afc8beb2073efc8fb063 +Subproject commit 558cd81bdd432769b59bff01240c44f82cfb1a9d