From 9467d44c4d5d9a2f1e0b4e3e0239320cbf81c1d2 Mon Sep 17 00:00:00 2001 From: ths Date: Sun, 3 Jun 2007 21:02:38 +0000 Subject: [PATCH] Move target-specific defines to the target directories. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2940 c046a42c-6fe2-441c-8c8c-71466251a162 --- cpu-all.h | 71 ---------------------------------------------- target-alpha/cpu.h | 6 ++++ target-arm/cpu.h | 7 +++++ target-i386/cpu.h | 7 +++++ target-m68k/cpu.h | 7 +++++ target-mips/cpu.h | 6 ++++ target-ppc/cpu.h | 6 ++++ target-sh4/cpu.h | 6 ++++ target-sparc/cpu.h | 6 ++++ 9 files changed, 51 insertions(+), 71 deletions(-) diff --git a/cpu-all.h b/cpu-all.h index 5db290356e..289d660f14 100644 --- a/cpu-all.h +++ b/cpu-all.h @@ -692,77 +692,6 @@ int page_get_flags(target_ulong address); void page_set_flags(target_ulong start, target_ulong end, int flags); void page_unprotect_range(target_ulong data, target_ulong data_size); -#define SINGLE_CPU_DEFINES -#ifdef SINGLE_CPU_DEFINES - -#if defined(TARGET_I386) - -#define CPUState CPUX86State -#define cpu_init cpu_x86_init -#define cpu_exec cpu_x86_exec -#define cpu_gen_code cpu_x86_gen_code -#define cpu_signal_handler cpu_x86_signal_handler - -#elif defined(TARGET_ARM) - -#define CPUState CPUARMState -#define cpu_init cpu_arm_init -#define cpu_exec cpu_arm_exec -#define cpu_gen_code cpu_arm_gen_code -#define cpu_signal_handler cpu_arm_signal_handler - -#elif defined(TARGET_SPARC) - -#define CPUState CPUSPARCState -#define cpu_init cpu_sparc_init -#define cpu_exec cpu_sparc_exec -#define cpu_gen_code cpu_sparc_gen_code -#define cpu_signal_handler cpu_sparc_signal_handler - -#elif defined(TARGET_PPC) - -#define CPUState CPUPPCState -#define cpu_init cpu_ppc_init -#define cpu_exec cpu_ppc_exec -#define cpu_gen_code cpu_ppc_gen_code -#define cpu_signal_handler cpu_ppc_signal_handler - -#elif defined(TARGET_M68K) -#define CPUState CPUM68KState -#define cpu_init cpu_m68k_init -#define cpu_exec cpu_m68k_exec -#define cpu_gen_code cpu_m68k_gen_code -#define cpu_signal_handler cpu_m68k_signal_handler - -#elif defined(TARGET_MIPS) -#define CPUState CPUMIPSState -#define cpu_init cpu_mips_init -#define cpu_exec cpu_mips_exec -#define cpu_gen_code cpu_mips_gen_code -#define cpu_signal_handler cpu_mips_signal_handler - -#elif defined(TARGET_SH4) -#define CPUState CPUSH4State -#define cpu_init cpu_sh4_init -#define cpu_exec cpu_sh4_exec -#define cpu_gen_code cpu_sh4_gen_code -#define cpu_signal_handler cpu_sh4_signal_handler - -#elif defined(TARGET_ALPHA) -#define CPUState CPUAlphaState -#define cpu_init cpu_alpha_init -#define cpu_exec cpu_alpha_exec -#define cpu_gen_code cpu_alpha_gen_code -#define cpu_signal_handler cpu_alpha_signal_handler - -#else - -#error unsupported target CPU - -#endif - -#endif /* SINGLE_CPU_DEFINES */ - CPUState *cpu_copy(CPUState *env); void cpu_dump_state(CPUState *env, FILE *f, diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h index 729d5876e0..c79c5680ae 100644 --- a/target-alpha/cpu.h +++ b/target-alpha/cpu.h @@ -300,6 +300,12 @@ struct CPUAlphaState { pal_handler_t *pal_handler; }; +#define CPUState CPUAlphaState +#define cpu_init cpu_alpha_init +#define cpu_exec cpu_alpha_exec +#define cpu_gen_code cpu_alpha_gen_code +#define cpu_signal_handler cpu_alpha_signal_handler + #include "cpu-all.h" enum { diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 4723807626..80727bb8a2 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -285,6 +285,13 @@ void cpu_arm_set_cp_io(CPUARMState *env, int cpnum, architecture revisions. Maybe an a configure option to disable them. */ #define TARGET_PAGE_BITS 10 #endif + +#define CPUState CPUARMState +#define cpu_init cpu_arm_init +#define cpu_exec cpu_arm_exec +#define cpu_gen_code cpu_arm_gen_code +#define cpu_signal_handler cpu_arm_signal_handler + #include "cpu-all.h" #endif diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 2b4295ae17..3a82426b8d 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -661,6 +661,13 @@ static inline int cpu_get_time_fast(void) #endif #define TARGET_PAGE_BITS 12 + +#define CPUState CPUX86State +#define cpu_init cpu_x86_init +#define cpu_exec cpu_x86_exec +#define cpu_gen_code cpu_x86_gen_code +#define cpu_signal_handler cpu_x86_signal_handler + #include "cpu-all.h" #endif /* CPU_I386_H */ diff --git a/target-m68k/cpu.h b/target-m68k/cpu.h index 2d43354e27..b0e725d4a0 100644 --- a/target-m68k/cpu.h +++ b/target-m68k/cpu.h @@ -216,6 +216,13 @@ void register_m68k_insns (CPUM68KState *env); /* Smallest TLB entry size is 1k. */ #define TARGET_PAGE_BITS 10 #endif + +#define CPUState CPUM68KState +#define cpu_init cpu_m68k_init +#define cpu_exec cpu_m68k_exec +#define cpu_gen_code cpu_m68k_gen_code +#define cpu_signal_handler cpu_m68k_signal_handler + #include "cpu-all.h" #endif diff --git a/target-mips/cpu.h b/target-mips/cpu.h index 6dff8ef557..7650be48c0 100644 --- a/target-mips/cpu.h +++ b/target-mips/cpu.h @@ -317,6 +317,12 @@ int mips_find_by_name (const unsigned char *name, mips_def_t **def); void mips_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...)); int cpu_mips_register (CPUMIPSState *env, mips_def_t *def); +#define CPUState CPUMIPSState +#define cpu_init cpu_mips_init +#define cpu_exec cpu_mips_exec +#define cpu_gen_code cpu_mips_gen_code +#define cpu_signal_handler cpu_mips_signal_handler + #include "cpu-all.h" /* Memory access type : diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index a25d30a627..6b627f26b4 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -899,6 +899,12 @@ int ppcemb_tlb_search (CPUPPCState *env, target_ulong address); int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, target_ulong *valp); int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val); +#define CPUState CPUPPCState +#define cpu_init cpu_ppc_init +#define cpu_exec cpu_ppc_exec +#define cpu_gen_code cpu_ppc_gen_code +#define cpu_signal_handler cpu_ppc_signal_handler + #include "cpu-all.h" /*****************************************************************************/ diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h index e844d690e2..00ee062680 100644 --- a/target-sh4/cpu.h +++ b/target-sh4/cpu.h @@ -126,6 +126,12 @@ int cpu_sh4_signal_handler(int host_signum, void *pinfo, #include "softfloat.h" +#define CPUState CPUSH4State +#define cpu_init cpu_sh4_init +#define cpu_exec cpu_sh4_exec +#define cpu_gen_code cpu_sh4_gen_code +#define cpu_signal_handler cpu_sh4_signal_handler + #include "cpu-all.h" /* Memory access type */ diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h index 198ba54e12..9229ad4a7d 100644 --- a/target-sparc/cpu.h +++ b/target-sparc/cpu.h @@ -302,6 +302,12 @@ void do_tick_set_count(void *opaque, uint64_t count); uint64_t do_tick_get_count(void *opaque); void do_tick_set_limit(void *opaque, uint64_t limit); +#define CPUState CPUSPARCState +#define cpu_init cpu_sparc_init +#define cpu_exec cpu_sparc_exec +#define cpu_gen_code cpu_sparc_gen_code +#define cpu_signal_handler cpu_sparc_signal_handler + #include "cpu-all.h" #endif