correct DMA and transfer mode reporting (Jens Axboe)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1736 c046a42c-6fe2-441c-8c8c-71466251a162
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8147cfca56
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61
hw/ide.c
61
hw/ide.c
@ -296,6 +296,8 @@ typedef struct IDEState {
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int cylinders, heads, sectors;
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int64_t nb_sectors;
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int mult_sectors;
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int identify_set;
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uint16_t identify_data[256];
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SetIRQFunc *set_irq;
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void *irq_opaque;
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int irq;
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@ -414,6 +416,11 @@ static void ide_identify(IDEState *s)
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unsigned int oldsize;
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char buf[20];
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if (s->identify_set) {
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memcpy(s->io_buffer, s->identify_data, sizeof(s->identify_data));
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return;
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}
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memset(s->io_buffer, 0, 512);
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p = (uint16_t *)s->io_buffer;
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put_le16(p + 0, 0x0040);
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@ -433,10 +440,10 @@ static void ide_identify(IDEState *s)
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put_le16(p + 47, 0x8000 | MAX_MULT_SECTORS);
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#endif
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put_le16(p + 48, 1); /* dword I/O */
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put_le16(p + 49, 1 << 9 | 1 << 8); /* DMA and LBA supported */
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put_le16(p + 49, (1 << 11) | (1 << 9) | (1 << 8)); /* DMA and LBA supported */
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put_le16(p + 51, 0x200); /* PIO transfer cycle */
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put_le16(p + 52, 0x200); /* DMA transfer cycle */
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put_le16(p + 53, 1 | 1 << 2); /* words 54-58,88 are valid */
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put_le16(p + 53, 1 | (1 << 1) | (1 << 2)); /* words 54-58,64-70,88 are valid */
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put_le16(p + 54, s->cylinders);
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put_le16(p + 55, s->heads);
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put_le16(p + 56, s->sectors);
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@ -447,15 +454,24 @@ static void ide_identify(IDEState *s)
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put_le16(p + 59, 0x100 | s->mult_sectors);
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put_le16(p + 60, s->nb_sectors);
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put_le16(p + 61, s->nb_sectors >> 16);
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put_le16(p + 80, (1 << 1) | (1 << 2));
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put_le16(p + 63, 0x07); /* mdma0-2 supported */
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put_le16(p + 65, 120);
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put_le16(p + 66, 120);
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put_le16(p + 67, 120);
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put_le16(p + 68, 120);
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put_le16(p + 80, 0xf0); /* ata3 -> ata6 supported */
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put_le16(p + 81, 0x16); /* conforms to ata5 */
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put_le16(p + 82, (1 << 14));
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put_le16(p + 83, (1 << 14));
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put_le16(p + 84, (1 << 14));
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put_le16(p + 85, (1 << 14));
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put_le16(p + 86, 0);
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put_le16(p + 87, (1 << 14));
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put_le16(p + 88, 0x1f | (1 << 13));
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put_le16(p + 93, 1 | (1 << 14) | 0x2000 | 0x4000);
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put_le16(p + 88, 0x3f | (1 << 13)); /* udma5 set and supported */
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put_le16(p + 93, 1 | (1 << 14) | 0x2000);
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memcpy(s->identify_data, p, sizeof(s->identify_data));
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s->identify_set = 1;
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}
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static void ide_atapi_identify(IDEState *s)
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@ -463,6 +479,11 @@ static void ide_atapi_identify(IDEState *s)
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uint16_t *p;
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char buf[20];
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if (s->identify_set) {
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memcpy(s->io_buffer, s->identify_data, sizeof(s->identify_data));
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return;
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}
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memset(s->io_buffer, 0, 512);
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p = (uint16_t *)s->io_buffer;
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/* Removable CDROM, 50us response, 12 byte packets */
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@ -483,11 +504,14 @@ static void ide_atapi_identify(IDEState *s)
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put_le16(p + 66, 0xb4); /* recommended DMA multiword tx cycle time */
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put_le16(p + 67, 0x12c); /* minimum PIO cycle time without flow control */
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put_le16(p + 68, 0xb4); /* minimum PIO cycle time with IORDY flow control */
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put_le16(p + 71, 30); /* in ns */
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put_le16(p + 72, 30); /* in ns */
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put_le16(p + 80, 0x1e); /* support up to ATA/ATAPI-4 */
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memcpy(s->identify_data, p, sizeof(s->identify_data));
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s->identify_set = 1;
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}
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static void ide_set_signature(IDEState *s)
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@ -1601,13 +1625,36 @@ static void ide_ioport_write(void *opaque, uint32_t addr, uint32_t val)
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/* XXX: valid for CDROM ? */
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switch(s->feature) {
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case 0x02: /* write cache enable */
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case 0x03: /* set transfer mode */
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case 0x82: /* write cache disable */
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case 0xaa: /* read look-ahead enable */
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case 0x55: /* read look-ahead disable */
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s->status = READY_STAT | SEEK_STAT;
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ide_set_irq(s);
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break;
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case 0x03: { /* set transfer mode */
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uint8_t val = s->nsector & 0x07;
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switch (s->nsector >> 3) {
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case 0x00: /* pio default */
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case 0x01: /* pio mode */
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put_le16(s->identify_data + 63,0x07);
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put_le16(s->identify_data + 88,0x3f);
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break;
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case 0x04: /* mdma mode */
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put_le16(s->identify_data + 63,0x07 | (1 << (val + 8)));
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put_le16(s->identify_data + 88,0x3f);
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break;
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case 0x08: /* udma mode */
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put_le16(s->identify_data + 63,0x07);
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put_le16(s->identify_data + 88,0x3f | (1 << (val + 8)));
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break;
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default:
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goto abort_cmd;
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}
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s->status = READY_STAT | SEEK_STAT;
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ide_set_irq(s);
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break;
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}
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default:
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goto abort_cmd;
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}
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