target/avr: Add DisasContextBase to DisasContext
Migrate the bstate, tb and singlestep_enabled fields from DisasContext into the base. Tested-by: Michael Rolnik <mrolnik@gmail.com> Reviewed-by: Michael Rolnik <mrolnik@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -80,7 +80,7 @@ typedef struct DisasContext DisasContext;
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/* This is the state at translation time. */
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struct DisasContext {
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TranslationBlock *tb;
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DisasContextBase base;
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CPUAVRState *env;
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CPUState *cs;
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@ -90,8 +90,6 @@ struct DisasContext {
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/* Routine used to access memory */
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int memidx;
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int bstate;
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int singlestep;
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/*
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* some AVR instructions can make the following instruction to be skipped
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@ -191,7 +189,7 @@ static bool avr_have_feature(DisasContext *ctx, int feature)
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{
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if (!avr_feature(ctx->env, feature)) {
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gen_helper_unsupported(cpu_env);
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ctx->bstate = DISAS_NORETURN;
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ctx->base.is_jmp = DISAS_NORETURN;
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return false;
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}
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return true;
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@ -1011,13 +1009,13 @@ static void gen_jmp_ez(DisasContext *ctx)
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{
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tcg_gen_deposit_tl(cpu_pc, cpu_r[30], cpu_r[31], 8, 8);
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tcg_gen_or_tl(cpu_pc, cpu_pc, cpu_eind);
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ctx->bstate = DISAS_LOOKUP;
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ctx->base.is_jmp = DISAS_LOOKUP;
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}
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static void gen_jmp_z(DisasContext *ctx)
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{
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tcg_gen_deposit_tl(cpu_pc, cpu_r[30], cpu_r[31], 8, 8);
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ctx->bstate = DISAS_LOOKUP;
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ctx->base.is_jmp = DISAS_LOOKUP;
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}
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static void gen_push_ret(DisasContext *ctx, int ret)
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@ -1083,9 +1081,9 @@ static void gen_pop_ret(DisasContext *ctx, TCGv ret)
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static void gen_goto_tb(DisasContext *ctx, int n, target_ulong dest)
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{
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TranslationBlock *tb = ctx->tb;
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const TranslationBlock *tb = ctx->base.tb;
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if (ctx->singlestep == 0) {
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if (!ctx->base.singlestep_enabled) {
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tcg_gen_goto_tb(n);
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tcg_gen_movi_i32(cpu_pc, dest);
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tcg_gen_exit_tb(tb, n);
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@ -1094,7 +1092,7 @@ static void gen_goto_tb(DisasContext *ctx, int n, target_ulong dest)
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gen_helper_debug(cpu_env);
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tcg_gen_exit_tb(NULL, 0);
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}
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ctx->bstate = DISAS_NORETURN;
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ctx->base.is_jmp = DISAS_NORETURN;
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}
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/*
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@ -1254,7 +1252,7 @@ static bool trans_RET(DisasContext *ctx, arg_RET *a)
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{
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gen_pop_ret(ctx, cpu_pc);
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ctx->bstate = DISAS_LOOKUP;
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ctx->base.is_jmp = DISAS_LOOKUP;
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return true;
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}
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@ -1272,7 +1270,7 @@ static bool trans_RETI(DisasContext *ctx, arg_RETI *a)
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tcg_gen_movi_tl(cpu_If, 1);
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/* Need to return to main loop to re-evaluate interrupts. */
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ctx->bstate = DISAS_EXIT;
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ctx->base.is_jmp = DISAS_EXIT;
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return true;
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}
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@ -1484,7 +1482,7 @@ static bool trans_BRBC(DisasContext *ctx, arg_BRBC *a)
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gen_goto_tb(ctx, 0, ctx->npc + a->imm);
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gen_set_label(not_taken);
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ctx->bstate = DISAS_CHAIN;
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ctx->base.is_jmp = DISAS_CHAIN;
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return true;
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}
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@ -1533,7 +1531,7 @@ static bool trans_BRBS(DisasContext *ctx, arg_BRBS *a)
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gen_goto_tb(ctx, 0, ctx->npc + a->imm);
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gen_set_label(not_taken);
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ctx->bstate = DISAS_CHAIN;
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ctx->base.is_jmp = DISAS_CHAIN;
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return true;
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}
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@ -1610,7 +1608,7 @@ static TCGv gen_get_zaddr(void)
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*/
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static void gen_data_store(DisasContext *ctx, TCGv data, TCGv addr)
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{
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if (ctx->tb->flags & TB_FLAGS_FULL_ACCESS) {
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if (ctx->base.tb->flags & TB_FLAGS_FULL_ACCESS) {
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gen_helper_fullwr(cpu_env, data, addr);
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} else {
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tcg_gen_qemu_st8(data, addr, MMU_DATA_IDX); /* mem[addr] = data */
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@ -1619,7 +1617,7 @@ static void gen_data_store(DisasContext *ctx, TCGv data, TCGv addr)
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static void gen_data_load(DisasContext *ctx, TCGv data, TCGv addr)
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{
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if (ctx->tb->flags & TB_FLAGS_FULL_ACCESS) {
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if (ctx->base.tb->flags & TB_FLAGS_FULL_ACCESS) {
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gen_helper_fullrd(data, cpu_env, addr);
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} else {
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tcg_gen_qemu_ld8u(data, addr, MMU_DATA_IDX); /* data = mem[addr] */
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@ -2793,7 +2791,7 @@ static bool trans_BREAK(DisasContext *ctx, arg_BREAK *a)
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#ifdef BREAKPOINT_ON_BREAK
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tcg_gen_movi_tl(cpu_pc, ctx->npc - 1);
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gen_helper_debug(cpu_env);
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ctx->bstate = DISAS_EXIT;
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ctx->base.is_jmp = DISAS_EXIT;
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#else
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/* NOP */
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#endif
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@ -2819,7 +2817,7 @@ static bool trans_NOP(DisasContext *ctx, arg_NOP *a)
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static bool trans_SLEEP(DisasContext *ctx, arg_SLEEP *a)
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{
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gen_helper_sleep(cpu_env);
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ctx->bstate = DISAS_NORETURN;
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ctx->base.is_jmp = DISAS_NORETURN;
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return true;
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}
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@ -2850,7 +2848,7 @@ static void translate(DisasContext *ctx)
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if (!decode_insn(ctx, opcode)) {
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gen_helper_unsupported(cpu_env);
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ctx->bstate = DISAS_NORETURN;
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ctx->base.is_jmp = DISAS_NORETURN;
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}
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}
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@ -2903,13 +2901,15 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
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{
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CPUAVRState *env = cs->env_ptr;
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DisasContext ctx = {
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.tb = tb,
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.base.tb = tb,
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.base.is_jmp = DISAS_NEXT,
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.base.pc_first = tb->pc,
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.base.pc_next = tb->pc,
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.base.singlestep_enabled = cs->singlestep_enabled,
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.cs = cs,
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.env = env,
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.memidx = 0,
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.bstate = DISAS_NEXT,
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.skip_cond = TCG_COND_NEVER,
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.singlestep = cs->singlestep_enabled,
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};
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target_ulong pc_start = tb->pc / 2;
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int num_insns = 0;
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@ -2921,7 +2921,7 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
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*/
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max_insns = 1;
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}
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if (ctx.singlestep) {
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if (ctx.base.singlestep_enabled) {
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max_insns = 1;
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}
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@ -2946,7 +2946,7 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
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* b main - sets breakpoint at address 0x00000100 (code)
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* b *0x100 - sets breakpoint at address 0x00800100 (data)
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*/
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if (unlikely(!ctx.singlestep &&
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if (unlikely(!ctx.base.singlestep_enabled &&
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(cpu_breakpoint_test(cs, OFFSET_CODE + ctx.npc * 2, BP_ANY) ||
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cpu_breakpoint_test(cs, OFFSET_DATA + ctx.npc * 2, BP_ANY)))) {
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canonicalize_skip(&ctx);
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@ -2989,11 +2989,11 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
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if (skip_label) {
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canonicalize_skip(&ctx);
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gen_set_label(skip_label);
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if (ctx.bstate == DISAS_NORETURN) {
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ctx.bstate = DISAS_CHAIN;
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if (ctx.base.is_jmp == DISAS_NORETURN) {
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ctx.base.is_jmp = DISAS_CHAIN;
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}
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}
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} while (ctx.bstate == DISAS_NEXT
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} while (ctx.base.is_jmp == DISAS_NEXT
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&& num_insns < max_insns
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&& (ctx.npc - pc_start) * 2 < TARGET_PAGE_SIZE - 4
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&& !tcg_op_buf_full());
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@ -3004,7 +3004,7 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
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bool nonconst_skip = canonicalize_skip(&ctx);
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switch (ctx.bstate) {
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switch (ctx.base.is_jmp) {
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case DISAS_NORETURN:
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assert(!nonconst_skip);
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break;
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@ -3019,13 +3019,13 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
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tcg_gen_movi_tl(cpu_pc, ctx.npc);
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/* fall through */
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case DISAS_LOOKUP:
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if (!ctx.singlestep) {
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if (!ctx.base.singlestep_enabled) {
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tcg_gen_lookup_and_goto_ptr();
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break;
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}
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/* fall through */
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case DISAS_EXIT:
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if (ctx.singlestep) {
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if (ctx.base.singlestep_enabled) {
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gen_helper_debug(cpu_env);
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} else {
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tcg_gen_exit_tb(NULL, 0);
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